 Imre Deak
|
3cc134e3ee
drm/i915: sanitize rps irq enabling
|
10 rokov pred |
|
Imre Deak
|
e534770add
drm/i915: move rps irq disable one level up
|
10 rokov pred |
 Tom O'Rourke
|
151a49d079
drm/i915: Extend pcode mailbox interface
|
11 rokov pred |
 Ville Syrjälä
|
ab3fb15730
drm/i915: Change CHV SKU400 GPU freq divider to 10
|
11 rokov pred |
|
Ville Syrjälä
|
80b83b6217
drm/i915: Add missing newline to 'DDR speed' debug messages
|
11 rokov pred |
|
Ville Syrjälä
|
dd06f88cd0
drm/i915: Refactor vlv/chv GPU frequency divider setup
|
11 rokov pred |
|
Ville Syrjälä
|
ce611ef81f
drm/i915: Improve PCBR debug information
|
11 rokov pred |
|
Ville Syrjälä
|
8d40c3ae51
drm/i915: Warn if GPLL isn't used on vlv/chv
|
11 rokov pred |
|
Ville Syrjälä
|
c8e9627d2a
drm/i915: Add a name for the Punit GPLLENABLE bit
|
11 rokov pred |
|
Ville Syrjälä
|
9a3b9c7a64
drm/i915: Silence valleyview_set_rps()
|
11 rokov pred |
 Damien Lespiau
|
f5ed50cbff
drm/i915: Let's hope future platforms will use the same WM code as SKL
|
11 rokov pred |
|
Damien Lespiau
|
dddab346d8
drm/i915: Clear PCODE_DATA1 on SNB+
|
11 rokov pred |
|
Ville Syrjälä
|
c6e8f39db9
drm/i915: Read the CCK fuse register from CCK
|
11 rokov pred |
|
Imre Deak
|
b900b94967
drm/i915: move rps irq enable/disable to i915_irq.c
|
11 rokov pred |
|
Imre Deak
|
20415c5d4e
drm/i915: unify gen6/gen8 rps irq enable/disable
|
11 rokov pred |
|
Imre Deak
|
a72fbc3a14
drm/i915: unify gen6/gen8 pm irq helpers
|
11 rokov pred |
 Arun Siluvery
|
3e470eaaee
drm/i915/chv: Remove pre-production workarounds
|
11 rokov pred |
 Zhe Wang
|
20e4936693
drm/i915/skl: Enable Gen9 RC6
|
11 rokov pred |
|
Damien Lespiau
|
d21b795c41
drm/i915/skl: Log the order in which we flush the pipes in the WM code
|
11 rokov pred |
|
Damien Lespiau
|
0e8fb7ba7c
drm/i915/skl: Flush the WM configuration
|
11 rokov pred |
|
Damien Lespiau
|
34bb56af7f
drm/i915/skl: Stage the pipe DDB allocation
|
11 rokov pred |
|
Damien Lespiau
|
5d374d9638
drm/i915/skl: Reduce the indentation level in skl_write_wm_values()
|
11 rokov pred |
|
Damien Lespiau
|
afb024aa65
drm/i915/skl: Correctly align skl_compute_plane_wm() arguments
|
11 rokov pred |
|
Damien Lespiau
|
9414f563f3
drm/i915/skl: Rework when the transition WMs are computed
|
11 rokov pred |
|
Damien Lespiau
|
407b50f31b
drm/i915/skl: Move all the WM compute functions in one place
|
11 rokov pred |
|
Damien Lespiau
|
e6d6617152
drm/i915/skl: Make res_blocks/lines intermediate values 32 bits
|
11 rokov pred |
|
Damien Lespiau
|
21fca258bc
drm/i915/skl: Use a more descriptive parameter name in skl_compute_plane_wm()
|
11 rokov pred |
|
Damien Lespiau
|
16160e3dd3
drm/i915/skl: Make 'end' of the DDB allocation entry exclusive
|
11 rokov pred |
|
Damien Lespiau
|
08db665203
drm/i915/skl: Check the DDB state at modeset
|
11 rokov pred |
|
Damien Lespiau
|
a269c5839b
drm/i915/skl: Read back the DDB allocation hw state
|
11 rokov pred |
