Dhinakaran Pandiyan
|
2bdd045e3a
drm/i915/psr: Check if VBT says PSR can be enabled.
|
7 年之前 |
José Roberto de Souza
|
2a34b0054b
drm/i915/psr/cnl: Set y-coordinate as valid in SDP
|
7 年之前 |
José Roberto de Souza
|
bc18b4df0f
drm/i915/psr/skl+: Print information about what caused a PSR exit
|
7 年之前 |
osé Roberto de Souza
|
75cbec033c
drm/i915/psr: Prevent PSR exit when a non-pipe related register is written
|
7 年之前 |
Dhinakaran Pandiyan
|
3f983e54fd
drm/i915/psr: Timestamps for PSR entry and exit interrupts.
|
7 年之前 |
Dhinakaran Pandiyan
|
54fd314959
drm/i915/psr: Control PSR interrupts via debugfs
|
7 年之前 |
Chris Wilson
|
daeb725e91
drm/i915/psr: Chase psr.enabled only under the psr.lock
|
7 年之前 |
José Roberto de Souza
|
4df4925b1b
drm/i915/psr: Set DPCD PSR2 enable bit when needed
|
7 年之前 |
José Roberto de Souza
|
26e5378d11
drm/i915/psr: Cache sink synchronization latency
|
7 年之前 |
José Roberto de Souza
|
fe36181be3
drm/i915/psr: Use PSR2 macro for PSR2
|
7 年之前 |
José Roberto de Souza
|
95f28d2ec7
drm/i915/psr: Do not override PSR2 sink support
|
7 年之前 |
José Roberto de Souza
|
5e87325f5c
drm/i915/psr/cnl: Enable Y-coordinate support in source
|
7 年之前 |
José Roberto de Souza
|
aee3bac0a3
drm/i915/psr: Tie PSR2 support to Y coordinate requirement
|
7 年之前 |
José Roberto de Souza
|
6ce9b78a73
drm/i915/psr: Nuke aux frame sync
|
7 年之前 |
Dhinakaran Pandiyan
|
d544e918ff
drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+
|
7 年之前 |
Dhinakaran Pandiyan
|
b90eed08d8
drm/i915/psr: Move PSR aux setup to it's own function.
|
7 年之前 |
Rodrigo Vivi
|
a8ada068a5
drm/i915: Move CUR SURFLIVE definition to a better place.
|
7 年之前 |
Rodrigo Vivi
|
5baf63cc4d
drm/i915/psr: Use more PSR HW tracking.
|
7 年之前 |
Rodrigo Vivi
|
caa1fd660e
drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.
|
7 年之前 |
Dhinakaran Pandiyan
|
c90c275c6f
drm/i915/psr: Update PSR2 resolution check for Cannonlake
|
7 年之前 |
Rodrigo Vivi
|
c4932d7956
drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.
|
7 年之前 |
Rodrigo Vivi
|
8cef3e5c0d
drm/i915/psr2: Fix max resolution supported.
|
7 年之前 |
Dhinakaran Pandiyan
|
06d058e1a0
drm/i915/psr: Check for power state control capability.
|
7 年之前 |
Dhinakaran Pandiyan
|
e2770e2e05
drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.
|
7 年之前 |
Dhinakaran Pandiyan
|
77fe36ff04
drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c
|
7 年之前 |
Dhinakaran Pandiyan
|
b891d5e46c
drm/i915/psr: New power domain for AUX IO.
|
7 年之前 |
Tvrtko Ursulin
|
c56b89f16d
drm/i915: Use INTEL_GEN everywhere
|
7 年之前 |
Dhinakaran Pandiyan
|
861023e0b6
drm/i915/psr: Don't name status or debug registers like control registers.
|
7 年之前 |
Dhinakaran Pandiyan
|
c9ef291a7e
drm/i915/psr: Avoid initializing PSR if there is no sink support.
|
7 年之前 |
Dhinakaran Pandiyan
|
4371d89601
drm/i915/psr: CAN_PSR() macro to check for PSR source and sink support.
|
7 年之前 |