 Ville Syrjälä
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7e6313a251
drm/i915: Don't use link_bw for PLL setup
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10 years ago |
 Rodrigo Vivi
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5f8b253147
drm/i915/skl: Update DDI buffer translation programming.
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10 years ago |
 Antti Koskipaa
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75067ddecf
drm/i915: Per-DDI I_boost override
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10 years ago |
|
Rodrigo Vivi
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500ea70d50
drm/i915: Set alternate aux for DDI-E
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10 years ago |
 Paulo Zanoni
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c30400fcff
drm/i915: set FDI translations to NULL on SKL
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10 years ago |
 Vandana Kannan
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e62925567c
drm/i915/bxt: BUNs related to port PLL
|
10 years ago |
|
Ville Syrjälä
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398a017e91
drm/i915: Fix HDMI 12bpc and pixel repeat clock readout for DDI platforms
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10 years ago |
 Imre Deak
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793dfa59bc
drm/i915/bxt: mask off the DPLL state checker bits we don't program
|
10 years ago |
|
Imre Deak
|
aa610dcb7c
drm/i915/bxt: add DDI port HW readout support
|
10 years ago |
|
Imre Deak
|
05712c1561
drm/i915/bxt: add missing DDI PLL registers to the state checking
|
10 years ago |
 David Weinehall
|
f8896f5d58
drm/i915/skl: Buffer translation improvements
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10 years ago |
 Damien Lespiau
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e7ad987832
drm/i915/skl: Skip remaining dividers when deviation is 0
|
10 years ago |
|
Damien Lespiau
|
267db66345
drm/i915/skl: Prefer even dividers for SKL DPLLs
|
10 years ago |
|
Damien Lespiau
|
dc25381392
drm/i915/skl: Replace the HDMI DPLL divider computation algorithm
|
10 years ago |
|
Imre Deak
|
fe4c63c8cb
drm/i915/bxt: fix DDI PHY vswing scale value setting
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10 years ago |
|
Damien Lespiau
|
d9062ae59d
drm/i915: Don't display the boot CDCLK twice
|
10 years ago |
 Sonika Jindal
|
64987fc59d
drm/i915/bxt: edp1.4 Intermediate Freq support
|
10 years ago |
|
Damien Lespiau
|
877f61d947
drm/i915/skl: Don't try to store the wrong central frequency
|
10 years ago |
|
Damien Lespiau
|
6358298337
drm/i915: Correctly prefix HSW/BDW HDMI clock functions
|
10 years ago |
|
Damien Lespiau
|
64311571a9
drm/i915/skl: Remove unnecessary () used with abs_diff()
|
10 years ago |
|
Damien Lespiau
|
30a7862de8
drm/i915/skl: Remove unnecessary () used with div_u64()
|
10 years ago |
|
Damien Lespiau
|
76516fbc29
drm/i915/skl: Factor out computing the DPLL paramaters from the dividers
|
10 years ago |
|
Damien Lespiau
|
9c2367538d
drm/i915/skl: Use a more idomatic early return
|
10 years ago |
|
Damien Lespiau
|
318bd821d6
drm/i915/skl: Propagate the error if we fail to find a suitable DPLL divider
|
10 years ago |
|
Damien Lespiau
|
19cdc0e6cd
drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing
|
10 years ago |
|
Damien Lespiau
|
6cf75178de
drm/i915/skl: Make sure to break when not finding suitable PLL dividers
|
10 years ago |
 Jani Nikula
|
d66716200a
drm/i915: remove useless DP and DDI encoder ->hot_plug hooks
|
10 years ago |
|
Jani Nikula
|
5fcece80ec
drm/i915: group all hotplug related fields into a new struct in dev_priv
|
10 years ago |
|
Damien Lespiau
|
5d96d8afcf
drm/i915/skl: Deinit/init the display at suspend/resume
|
10 years ago |
|
Vandana Kannan
|
e0681e3841
drm/i915/bxt: Move around lane stagger calculation
|
10 years ago |
