 David Ahern
|
2d89cd8625
sparc64: perf: Use UREG_FP rather than UREG_I6
|
10 years ago |
|
David Ahern
|
b69fb7699c
sparc64: perf: Add sanity checking on addresses in user stack
|
10 years ago |
|
David Ahern
|
c17af4dd96
sparc: perf: Disable pagefaults while walking userspace stacks
|
10 years ago |
 David S. Miller
|
df386375ff
sparc64: Use M7 PMC write on all chips T4 and onward.
|
10 years ago |
|
David Ahern
|
b5aff55d89
sparc: perf: Add support M7 processor
|
10 years ago |
|
David Ahern
|
d51291cb8f
sparc: perf: Make counting mode actually work
|
10 years ago |
|
David Ahern
|
5b0d4b5514
sparc: perf: Remove redundant perf_pmu_{en|dis}able calls
|
10 years ago |
 Linus Torvalds
|
0429fbc0bd
Merge branch 'for-3.18-consistent-ops' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu
|
10 years ago |
 bob picco
|
05aa1651e8
sparc64: T5 PMU
|
11 years ago |
 Christoph Lameter
|
494fc42170
sparc: Replace __get_cpu_var uses
|
11 years ago |
|
David S. Miller
|
8bccf5b313
sparc64: Fix pcr_ops initialization and usage bugs.
|
11 years ago |
 Sam Ravnborg
|
265c1ffa59
sparc64: fix sparse warnings in perf_event.c
|
11 years ago |
|
David S. Miller
|
517ffce4e1
sparc64: Make montmul/montsqr/mpmul usable in 32-bit threads.
|
12 years ago |
|
David S. Miller
|
e793d8c674
sparc64: Fix bit twiddling in sparc_pmu_enable_event().
|
12 years ago |
|
David S. Miller
|
08280e6c4c
sparc64: Like x86 we should check current->mm during perf backtrace generation.
|
13 years ago |
|
David S. Miller
|
bab96bda44
sparc64: Update generic comments in perf event code to match reality.
|
13 years ago |
|
David S. Miller
|
035ea28dde
sparc64: Add SPARC-T4 perf event support.
|
13 years ago |
|
David S. Miller
|
7a37a0b8f8
sparc64: Support perf event encoding for multi-PCR PMUs.
|
13 years ago |
|
David S. Miller
|
b4f061a4b8
sparc64: Make sparc_pmu_{enable,disable}_event() multi-pcr aware.
|
13 years ago |
|
David S. Miller
|
5ab9684135
sparc64: Rework sparc_pmu_enable() so that the side effects are clearer.
|
13 years ago |
|
David S. Miller
|
3f1a209722
sparc64: Prepare perf event layer for handling multiple PCR registers.
|
13 years ago |
|
David S. Miller
|
7ac2ed286f
sparc64: Specify user and supervisor trace PCR bits in sparc_pmu.
|
13 years ago |
|
David S. Miller
|
5344303ca8
sparc64: Abstract PMC read/write behind sparc_pmu.
|
13 years ago |
|
David S. Miller
|
59660495e8
sparc64: Allow max hw perf events to be variable.
|
13 years ago |
|
David S. Miller
|
b38e99f5bd
sparc64: Add perf_event abstractions for orthogonal PMUs.
|
13 years ago |
|
David S. Miller
|
09d053c797
sparc64: Abstract away PIC register accesses.
|
13 years ago |
|
David S. Miller
|
0bab20ba4c
sparc64: Add 'reg_num' argument to pcr_ops methods.
|
13 years ago |
 Robert Richter
|
fd0d000b2c
perf: Pass last sampling period to perf_sample_data_init()
|
13 years ago |
 David Howells
|
d550bbd40c
Disintegrate asm/system.h for Sparc
|
13 years ago |
 Stephane Eranian
|
2481c5fa6d
perf: Disable PERF_SAMPLE_BRANCH_* when not supported
|
13 years ago |
