 Markos Chandras
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a79f5f9ba5
MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction
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10 years ago |
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Markos Chandras
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4e9561b20e
MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction
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10 years ago |
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Markos Chandras
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38db37ba06
MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
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10 years ago |
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Markos Chandras
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400bd2e413
MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction
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10 years ago |
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Markos Chandras
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83d43305a1
MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction
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10 years ago |
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Markos Chandras
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e24c3bec3e
MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction
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10 years ago |
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Markos Chandras
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130fe357ee
MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction
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10 years ago |
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Markos Chandras
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67613f0278
MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instruction
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10 years ago |
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Markos Chandras
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f8c3c6717a
MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction
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10 years ago |
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Markos Chandras
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c909ca718e
MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions
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10 years ago |
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Markos Chandras
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e8f80cc1a6
MIPS: math-emu: Allow m{f,t}hc emulation on MIPS R6
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10 years ago |
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Markos Chandras
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bbdd8147b1
MIPS: cp1emu: Fix closing bracket for the d_fmt case
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10 years ago |
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Markos Chandras
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143fefc8f3
MIPS: Fix erroneous JR emulation for MIPS R6
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10 years ago |
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Markos Chandras
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e9d92d2233
MIPS: Fix branch emulation for BLTC and BGEC instructions
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10 years ago |
 Maciej W. Rozycki
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03dce59527
MIPS: Fix a preemption issue with thread's FPU defaults
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10 years ago |
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Maciej W. Rozycki
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9b26616c8d
MIPS: Respect the ISA level in FCSR handling
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10 years ago |
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Maciej W. Rozycki
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f1f3b7ebac
MIPS: math-emu: Define IEEE 754-2008 feature control bits
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10 years ago |
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Maciej W. Rozycki
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c491cfa2ca
MIPS: math-emu: Implement the FCCR, FEXR and FENR registers
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10 years ago |
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Maciej W. Rozycki
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f684362689
MIPS: math-emu: Set FIR feature flags for full emulation
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10 years ago |
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Maciej W. Rozycki
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9ab4471c9f
MIPS: math-emu: Correct delay-slot exception propagation
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10 years ago |
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Maciej W. Rozycki
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2d83fea786
MIPS: Correct FP ISA requirements
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10 years ago |
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Maciej W. Rozycki
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d4f5b08893
MIPS: math-emu: Factor out CFC1/CTC1 emulation
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10 years ago |
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Maciej W. Rozycki
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2cfcf8a831
MIPS: math-emu: Remove `modeindex' macro
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10 years ago |
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Maciej W. Rozycki
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5d77cf2895
MIPS: math-emu: Reindent `bc_op' emulation
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10 years ago |
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Markos Chandras
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e0d32f33e6
MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well
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10 years ago |
 Leonid Yegoshin
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b0a668fb20
MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
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10 years ago |
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Markos Chandras
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28d6f93d20
MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
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10 years ago |
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Markos Chandras
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69b9a2fd05
MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
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10 years ago |
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Markos Chandras
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84fef63012
MIPS: Emulate the new MIPS R6 BALC instruction
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10 years ago |
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Markos Chandras
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10d962d534
MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions
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10 years ago |
