Commit History

Autor SHA1 Mensaxe Data
  Russell King efaa6e266b firmware: qcom_scm-32: replace open-coded call to __cpuc_flush_dcache_area() %!s(int64=10) %!d(string=hai) anos
  Russell King 1234e3fda9 ARM: reduce visibility of dmac_* functions %!s(int64=10) %!d(string=hai) anos
  Arnd Bergmann 6e27549bbc ARM: 8380/1: bpf: fix NOMMU build %!s(int64=10) %!d(string=hai) anos
  Kees Cook 80d6b0c2ee ARM: mm: allow text and rodata sections to be read-only %!s(int64=11) %!d(string=hai) anos
  Krzysztof Kozlowski ebc77251a4 ARM: 8177/1: cacheflush: Fix v7_exit_coherency_flush exynos build breakage on ARMv6 %!s(int64=11) %!d(string=hai) anos
  Mark Rutland 2c32c65e37 ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex %!s(int64=11) %!d(string=hai) anos
  Victor Kamensky 72e6ae285a ARM: 8043/1: uprobes need icache flush after xol write %!s(int64=11) %!d(string=hai) anos
  Will Deacon 9581960a40 ARM: 8055/1: cacheflush: use -st dsb option for ensuring completion %!s(int64=11) %!d(string=hai) anos
  Vinayak Kale 39544ac9df ARM: 7957/1: add DSB after icache flush in __flush_icache_all() %!s(int64=11) %!d(string=hai) anos
  Laura Abbott 75374ad47c ARM: mm: Define set_memory_* functions for ARM %!s(int64=12) %!d(string=hai) anos
  Nicolas Pitre 39792c7cf3 ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code %!s(int64=12) %!d(string=hai) anos
  Russell King 5cc91e0460 Merge branch 'for-rmk/cacheflush-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable %!s(int64=12) %!d(string=hai) anos
  Will Deacon d9524dc32c ARM: cacheflush: don't round address range up to nearest page %!s(int64=13) %!d(string=hai) anos
  Will Deacon 6af396a6b6 ARM: cacheflush: use -ishst dsb variant for ensuring flush completion %!s(int64=12) %!d(string=hai) anos
  Simon Baatz 1bc39742aa ARM: 7755/1: handle user space mapped pages in flush_kernel_dcache_page %!s(int64=12) %!d(string=hai) anos
  Nicolas Pitre 0c91e7e07e ARM: cacheflush: add synchronization helpers for mixed cache state accesses %!s(int64=12) %!d(string=hai) anos
  Lorenzo Pieralisi 031bd879f7 ARM: mm: implement LoUIS API for cache maintenance ops %!s(int64=13) %!d(string=hai) anos
  Will Deacon b74253f784 ARM: 7479/1: mm: avoid NULL dereference when flushing gate_vma with VIVT caches %!s(int64=13) %!d(string=hai) anos
  Will Deacon c5102f5935 ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails %!s(int64=13) %!d(string=hai) anos
  Dima Zavin 4542b6a0fa ARM: 7365/1: drop unused parameter from flush_cache_user_range %!s(int64=13) %!d(string=hai) anos
  Russell King bd1274dc00 Merge branch 'v6v7' into devel %!s(int64=14) %!d(string=hai) anos
  Russell King 753790e713 ARM: move cache/processor/fault glue to separate include files %!s(int64=14) %!d(string=hai) anos
  Russell King 774c096bf9 ARM: v6/v7 cache: allow cache calls to be optimized %!s(int64=14) %!d(string=hai) anos
  Russell King e399b1a4e1 ARM: v6k: introduce CPU_V6K option %!s(int64=14) %!d(string=hai) anos
  Russell King 23beab76b4 Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', 'st-ux' and 'unwind' into devel %!s(int64=15) %!d(string=hai) anos
  Tony Lindgren 81d11955bf ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas f8b63c184a ARM: 6382/1: Remove superfluous flush_kernel_dcache_page() %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas c01778001a ARM: 6379/1: Assume new page cache pages have dirty D-cache %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas b8349b569a ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas 33f663ff91 ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4) %!s(int64=15) %!d(string=hai) anos