 Peter De Schrijver
|
cb6448ab0a
clk: tegra: Add missing Tegra20 fuse clks
|
11 years ago |
 Stephen Warren
|
a85f06badc
clk: tegra: remove bogus PCIE_XCLK
|
12 years ago |
|
Stephen Warren
|
6d5b988e7d
clk: tegra: implement a reset driver
|
12 years ago |
 Alexandre Courbot
|
5ab5d4048e
clk: tegra: add FUSE clock device
|
12 years ago |
|
Peter De Schrijver
|
540fc26a02
clk: tegra: move tegra20 to common infra
|
12 years ago |
|
Peter De Schrijver
|
76ebc134d4
clk: tegra: move periph clocks to common file
|
12 years ago |
|
Peter De Schrijver
|
ebe142b2ad
clk: tegra: move fields to tegra_clk_pll_params
|
12 years ago |
|
Peter De Schrijver
|
343a607cb7
clk: tegra: common periph_clk_enb_refcnt and clks
|
12 years ago |
|
Peter De Schrijver
|
d5ff89a82a
clk: tegra: simplify periph clock data
|
12 years ago |
 James Hogan
|
819c1de344
clk: add CLK_SET_RATE_NO_REPARENT flag
|
12 years ago |
 Sachin Kamat
|
a0be7a9e6a
clk: tegra20: Fix incorrect placement of __initdata
|
12 years ago |
 Prashant Gaikwad
|
061cec925f
clk: tegra: Use common of_clk_init function
|
12 years ago |
 Lucas Stach
|
6ec3240047
clk: tegra: add ac97 controller clock
|
12 years ago |
|
Lucas Stach
|
7e94984495
clk: tegra: remove USB from clk init table
|
12 years ago |
 Linus Torvalds
|
6fa52ed33b
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
|
12 years ago |
|
Linus Torvalds
|
4d26aa3054
Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
|
12 years ago |
 Arnd Bergmann
|
6abb057679
Merge tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/fixes-non-critical
|
12 years ago |
|
Peter De Schrijver
|
a26a029893
clk: tegra: Add flags to tegra_clk_periph()
|
12 years ago |
|
Peter De Schrijver
|
3e72771e21
clk: tegra: move from a lock bit idx to a lock mask
|
12 years ago |
|
Peter De Schrijver
|
0b6525acd1
clk: tegra: Add PLL post divider table
|
12 years ago |
|
Peter De Schrijver
|
dba4072a4a
clk: tegra: Refactor PLL programming code
|
12 years ago |
|
Stephen Warren
|
441f199a37
clk: tegra: defer application of init table
|
12 years ago |
|
Prashant Gaikwad
|
82ce742140
clk: tegra: Fix cdev1 and cdev2 IDs
|
12 years ago |
 Thierry Reding
|
ce910686f8
clk: tegra: Make gr2d and gr3d clocks children of pll_c
|
12 years ago |
|
Stephen Warren
|
8aa15d82df
Merge branch 'for-3.10/soc' into for-3.10/clk
|
12 years ago |
|
Thierry Reding
|
0f1bc12e9e
clk: tegra: Allow PLLE training to succeed
|
12 years ago |
|
Peter De Schrijver
|
bf161d2163
clk: tegra: No 7.1 super clk dividers on Tegra20
|
12 years ago |
|
Prashant Gaikwad
|
984b839337
clk: Tegra: Remove duplicate smp_twd clock
|
12 years ago |
 Laxman Dewangan
|
527fad1bc5
clk: tegra: initialise parent of uart clocks
|
12 years ago |
|
Stephen Warren
|
0203d91247
clk: tegra: fix driver to match DT binding
|
12 years ago |
