 Catalin Marinas
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6b4fee241d
arm64: Remove asm/pgtable-*level-hwdef.h files
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11 years ago |
|
Catalin Marinas
|
abe669d7e1
arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELS
|
11 years ago |
 Jungseok Lee
|
c79b954bf6
arm64: mm: Implement 4 levels of translation tables
|
11 years ago |
|
Jungseok Lee
|
e41ceed035
arm64: Introduce VA_BITS and translation level options
|
11 years ago |
 Steve Capper
|
206a2a73a6
arm64: mm: Create gigabyte kernel logical mappings where possible
|
11 years ago |
|
Catalin Marinas
|
35a8697692
arm64: Update the TCR_EL1 translation granule definitions for 16K pages
|
11 years ago |
 Radha Mohan Chintakuntla
|
87366d8cf7
arm64: Add boot time configuration of Intermediate Physical Address size
|
11 years ago |
|
Steve Capper
|
db4ed53cfe
arm64: mm: Fix PMD_SECT_PROT_NONE definition
|
11 years ago |
 Christoffer Dall
|
ad361f093c
KVM: ARM: Support hugetlbfs backed huge pages
|
13 years ago |
 Will Deacon
|
d50240a5f6
arm64: mm: permit use of tagged pointers at EL0
|
12 years ago |
|
Catalin Marinas
|
aa729dccb5
Merge branch 'for-next/hugepages' of git://git.linaro.org/people/stevecapper/linux into upstream-hugepages
|
12 years ago |
|
Steve Capper
|
af07484863
ARM64: mm: THP support.
|
12 years ago |
|
Steve Capper
|
084bd29810
ARM64: mm: HugeTLB support.
|
12 years ago |
 Marc Zyngier
|
363116073a
arm64: KVM: define HYP and Stage-2 translation page flags
|
12 years ago |
|
Catalin Marinas
|
8e620b0476
arm64: Distinguish between user and kernel XN bits
|
12 years ago |
|
Catalin Marinas
|
4f04d8f005
arm64: MMU definitions
|
13 years ago |
