 Piotr Redlewski
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c1fe75c9e4
drm/amd/amdgpu: fix UVD mc offsets
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7 years ago |
 pding
|
9953b72f9c
drm/amdgpu: change redundant init logs to debug level
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7 years ago |
 Monk Liu
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b3eebe3d89
drm/amd/scheduler:introduce guilty pointer member
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7 years ago |
 Linus Torvalds
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e60e1ee606
Merge tag 'drm-for-v4.15' of git://people.freedesktop.org/~airlied/linux
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7 years ago |
 Leo Liu
|
cb4b02d7ca
drm/amdgpu: return -ENOENT from uvd 6.0 early init for harvesting
|
7 years ago |
 Dave Airlie
|
7a88cbd8d6
Backmerge tag 'v4.14-rc7' into drm-next
|
7 years ago |
 Tom St Denis
|
d3daa2c786
drm/amd/amdgpu: Remove workaround check for UVD6 on APUs
|
7 years ago |
 Colin Ian King
|
f15507a1ac
drm/amdgpu: make function uvd_v6_0_enc_get_destroy_msg static
|
7 years ago |
 James Zhu
|
65da0d40e5
drm/amdgpu: add uvd enc irq
|
7 years ago |
|
James Zhu
|
e0128efb08
drm/amdgpu: add uvd enc ib test
|
7 years ago |
|
James Zhu
|
2a91f272e3
drm/amdgpu: add uvd enc ring test
|
7 years ago |
|
James Zhu
|
c259ee6e30
drm/amdgpu: add uvd enc vm functions (v2)
|
7 years ago |
|
James Zhu
|
296191c5e8
drm/amdgpu: add uvd enc into run queue
|
7 years ago |
|
James Zhu
|
06a7e9cb57
drm/amdgpu: add uvd enc rings
|
7 years ago |
|
James Zhu
|
c0f2f2e66c
drm/amdgpu: add new uvd enc ring methods
|
7 years ago |
 Rex Zhu
|
502372878a
drm/amdgpu: various cleanups for uvd/vce.
|
8 years ago |
|
Rex Zhu
|
1c622002b1
drm/amd/powerplay: add a new register define for APU in VI.
|
8 years ago |
 Alex Deucher
|
d766e6a393
drm/amdgpu: switch ih handling to two levels (v3)
|
9 years ago |
 Ken Wang
|
536fbf946c
drm/amdgpu: change wptr to 64 bits (v2)
|
9 years ago |
|
Rex Zhu
|
254cd2e08d
drm/amdgpu: read hw register to check pg status.
|
8 years ago |
|
Rex Zhu
|
e3e672e631
drm/amdgpu: refine uvd5.0/6.0 code.
|
8 years ago |
 Huang Rui
|
c8781f56c8
drm/amdgpu: add get clockgating_state method for uvd v5&v6
|
8 years ago |
|
Rex Zhu
|
3c3a7e616c
drm/amdgpu: fix bug mclk can't change on Polaris
|
8 years ago |
|
Rex Zhu
|
805b3ba87d
drm/amdgpu: refine uvd 6.0 clock gate feature.
|
8 years ago |
|
Rex Zhu
|
0401eb403d
drm/amdgpu: not set bypass mode for uvd5.0/uvd6.0
|
8 years ago |
|
Rex Zhu
|
4be5097ccb
drm/amdgpu: enable uvd bypass mode for CI/VI.
|
8 years ago |
|
Alex Deucher
|
a125510721
drm/amdgpu: rework IP block registration (v2)
|
8 years ago |
 Christian König
|
7988714237
drm/amdgpu: move align_mask and nop into ring funcs as well (v2)
|
8 years ago |
|
Christian König
|
21cd942e5c
drm/amdgpu: move the ring type into the funcs structure (v2)
|
8 years ago |
|
Christian König
|
e12f3d7a23
drm/amdgpu: move IB and frame size directly into the engine description
|
8 years ago |
