Commit History

Autor SHA1 Mensaxe Data
  Thierry Reding 9910f5c455 drm/tegra: Remove host1x drm_bus implementation %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 76245adbc1 drm/tegra: dsi - Do not needlessly recompute pclk %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 91eded9b48 drm/tegra: dc - Compute shift clock divider in output drivers %!s(int64=11) %!d(string=hai) anos
  Thierry Reding cb825d89f5 drm/tegra: dsi - Reset controller on driver unload %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 79eb7e5dab drm/tegra: dsi - Fix typo when disabling controller %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 334ae6b527 drm/tegra: dsi - Add enable guard %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 17297a2813 drm/tegra: dsi - Initialize proper packet sequences %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 3b077afb3a drm/tegra: dsi - Implement VDD supply support %!s(int64=11) %!d(string=hai) anos
  Thierry Reding bcfc7acbca drm/tegra: dsi - Remove unneeded code %!s(int64=11) %!d(string=hai) anos
  Thierry Reding f7d6889b79 drm/tegra: dsi - Use internal pixel format %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 9a2ac2dcdc drm/tegra: Relicense under GPL v2 %!s(int64=11) %!d(string=hai) anos
  Thierry Reding 72d3028615 drm/tegra: Relocate some output-specific code %!s(int64=11) %!d(string=hai) anos
  Wei Yongjun 85316eae48 drm/tegra: Fix return value check %!s(int64=12) %!d(string=hai) anos
  Thierry Reding dec727399a drm/tegra: Add DSI support %!s(int64=12) %!d(string=hai) anos