 Alex Deucher
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a02dc74b31
drm/radeon/dce32+: use fractional fb dividers for high clocks
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%!s(int64=13) %!d(string=hai) anos |
 Jerome Glisse
|
fc58acdbf1
radeon: fix pll/ctrc mapping on dce2 and dce3 hardware
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%!s(int64=12) %!d(string=hai) anos |
|
Alex Deucher
|
1e4db5f2b4
drm/radeon/dce3: switch back to old pll allocation order for discrete
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
29dbe3bcd2
drm/radeon: allocate PPLLs from low to high
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
c0fd0834aa
drm/radeon: validate PPLL in crtc fixup
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
57b35e29cf
drm/radeon: work around KMS modeset limitations in PLL allocation (v2)
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
9642ac0e64
drm/radeon: make non-DP PPLL sharing more robust
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
5df3196bac
drm/radeon: store the encoder in the radeon_crtc
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
19eca43e5a
drm/radeon: rework crtc pll setup to better support PPLL sharing
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
2f454cf126
drm/radeon: allow PPLL sharing on non-DP displays
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
9dbbcfc689
drm/radeon/dce3: use a single PPLL for all DP displays
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
f3dd8508d4
drm/radeon: rework pll selection (v4)
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
e729586e33
drm/radeon/atom: fix typo in SetPixelClock handling
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
2f1f4d9b60
Revert "drm/radeon: rework pll selection (v3)"
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%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
985f61f7ee
drm/radeon: rework pll selection (v3)
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
c205b232a6
drm/radeon/atom: powergating fixes for DCE6
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
4e58591c89
drm/radeon: don't disable plls that are in use by other crtcs
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
5317670692
drm/radeon/ss: use num_crtc rather than hardcoded 6
|
%!s(int64=13) %!d(string=hai) anos |
|
Jerome Glisse
|
5efcc76c13
drm/radeon: avoid turning off spread spectrum for used pll
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
ecd67955fd
drm/radeon: fix ordering in pll picking on dce4+
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
6c0ae2ab85
drm/radeon: properly handle crtc powergating
|
%!s(int64=13) %!d(string=hai) anos |
 Laurent Pinchart
|
e811f5ae19
drm: Make the .mode_fixup() operations mode argument a const pointer
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
f312f09378
drm/radeon: fix SS setup for DCPLL
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
26fe45a0a7
drm/radeon: fix up pll selection on DCE5/6
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
b7019b2f31
drm/radeon: SI tiling fixes for display
|
%!s(int64=13) %!d(string=hai) anos |
 Daniel Vetter
|
dc257cf154
Merge tag 'v3.4-rc6' into drm-intel-next
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
700698e7c3
drm/radeon/kms: need to set up ss on DP bridges as well
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
37d4174d2d
drm/radeon/kms: use frac fb div on APUs
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
eccea7920c
drm/radeon/kms: improve bpc handling (v2)
|
%!s(int64=13) %!d(string=hai) anos |
|
Alex Deucher
|
017d213f64
drm/radeon/kms/atom: force bpc to 8 for now
|
%!s(int64=13) %!d(string=hai) anos |
