Historique des commits

Auteur SHA1 Message Date
  Daniel Vetter b45305fce5 drm/i915: Implement workaround for broken CS tlb on i830/845 il y a 12 ans
  Ville Syrjälä 633cf8f505 drm/i915: Don't allow ring tail to reach the same cacheline as head il y a 12 ans
  Chris Wilson 3e9605018a drm/i915: Rearrange code to only have a single method for waiting upon the ring il y a 12 ans
  Chris Wilson 9d7730914f drm/i915: Preallocate next seqno before touching the ring il y a 12 ans
  Chris Wilson 1c8b46fc8c drm/i915: Use LRI to update the semaphore registers il y a 13 ans
  Chris Wilson 6b8294a4d3 drm/i915: Restore physical HWS_PGA after resume il y a 13 ans
  Daniel Vetter b3fcabb15b drm/i915: drop the double-OP_STOREDW usage in blt_ring_flush il y a 13 ans
  Jesse Barnes 3ac7831314 drm/i915: PIPE_CONTROL TLB invalidate requires CS stall il y a 13 ans
  Jesse Barnes 9a28977181 drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3 il y a 13 ans
  Mika Kuoppala 17f10fdc01 drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths il y a 13 ans
  Daniel Vetter c2fb791692 Merge tag 'v3.7-rc2' into drm-intel-next-queued il y a 13 ans
  Chris Wilson d7d4eeddb8 drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffers il y a 13 ans
  Linus Torvalds 612a9aab56 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux il y a 13 ans
  David Howells 760285e7e7 UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/ il y a 13 ans
  David Howells 4126d5d61f UAPI: (Scripted) Remove redundant DRM UAPI header #inclusions from drivers/gpu/. il y a 13 ans
  Chris Wilson 9da3da660d drm/i915: Replace the array of pages with a scatterlist il y a 13 ans
  Paulo Zanoni f39876317a drm/i915: add workarounds to gen7_render_ring_flush il y a 13 ans
  Paulo Zanoni b311150927 drm/i915: add workarounds directly to gen6_render_ring_flush il y a 13 ans
  Paulo Zanoni 4772eaebcd drm/i915: add gen7_render_ring_flush il y a 13 ans
  Chris Wilson 86a1ee26bb drm/i915: Only pwrite through the GTT if there is space in the aperture il y a 13 ans
  Daniel Vetter a22ddff8be Merge tag 'v3.6-rc2' into drm-intel-next il y a 13 ans
  Chris Wilson 7d54a90428 drm/i915: Apply post-sync write for pipe control invalidates il y a 13 ans
  Chris Wilson b2eadbc85b drm/i915: Lazily apply the SNB+ seqno w/a il y a 13 ans
  Daniel Vetter 0d8957c8a9 drm/i915: correctly order the ring init sequence il y a 13 ans
  Chris Wilson 6c6cf5aa9c drm/i915: Only apply the SNB pipe control w/a to gen6 il y a 13 ans
  Ben Widawsky e1ef7cc299 drm/i915: Macro to determine DPF support il y a 13 ans
  Chris Wilson a7b9761d0a drm/i915: Split i915_gem_flush_ring() into seperate invalidate/flush funcs il y a 13 ans
  Chris Wilson 69c2fc8913 drm/i915: Remove the per-ring write list il y a 13 ans
  Ben Widawsky 2e6c21ed63 drm/i915: missing error case in init status page il y a 13 ans
  Chris Wilson 12f55818ba drm/i915: Add comments to explain the BSD tail write workaround il y a 13 ans