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@@ -894,17 +894,15 @@ static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid)
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struct device *dev = &bgx->pdev->dev;
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struct lmac *lmac;
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char str[20];
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- u8 dlm;
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- if (lmacid > bgx->max_lmac)
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+ if (!bgx->is_dlm && lmacid)
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return;
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lmac = &bgx->lmac[lmacid];
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- dlm = (lmacid / 2) + (bgx->bgx_id * 2);
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if (!bgx->is_dlm)
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sprintf(str, "BGX%d QLM mode", bgx->bgx_id);
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else
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- sprintf(str, "BGX%d DLM%d mode", bgx->bgx_id, dlm);
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+ sprintf(str, "BGX%d LMAC%d mode", bgx->bgx_id, lmacid);
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switch (lmac->lmac_type) {
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case BGX_MODE_SGMII:
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@@ -990,7 +988,6 @@ static void lmac_set_training(struct bgx *bgx, struct lmac *lmac, int lmacid)
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static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
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{
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struct lmac *lmac;
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- struct lmac *olmac;
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u64 cmr_cfg;
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u8 lmac_type;
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u8 lane_to_sds;
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@@ -1010,62 +1007,26 @@ static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
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return;
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}
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- /* On 81xx BGX can be split across 2 DLMs
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- * firmware programs lmac_type of LMAC0 and LMAC2
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+ /* For DLMs or SLMs on 80/81/83xx so many lane configurations
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+ * are possible and vary across boards. Also Kernel doesn't have
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+ * any way to identify board type/info and since firmware does,
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+ * just take lmac type and serdes lane config as is.
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*/
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- if ((idx == 0) || (idx == 2)) {
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- cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG);
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- lmac_type = (u8)((cmr_cfg >> 8) & 0x07);
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- lane_to_sds = (u8)(cmr_cfg & 0xFF);
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- /* Check if config is not reset value */
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- if ((lmac_type == 0) && (lane_to_sds == 0xE4))
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- lmac->lmac_type = BGX_MODE_INVALID;
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- else
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- lmac->lmac_type = lmac_type;
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- lmac_set_training(bgx, lmac, lmac->lmacid);
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- lmac_set_lane2sds(bgx, lmac);
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-
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- olmac = &bgx->lmac[idx + 1];
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- /* Check if other LMAC on the same DLM is already configured by
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- * firmware, if so use the same config or else set as same, as
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- * that of LMAC 0/2.
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- * This check is needed as on 80xx only one lane of each of the
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- * DLM of BGX0 is used, so have to rely on firmware for
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- * distingushing 80xx from 81xx.
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- */
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- cmr_cfg = bgx_reg_read(bgx, idx + 1, BGX_CMRX_CFG);
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- lmac_type = (u8)((cmr_cfg >> 8) & 0x07);
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- lane_to_sds = (u8)(cmr_cfg & 0xFF);
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- if ((lmac_type == 0) && (lane_to_sds == 0xE4)) {
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- olmac->lmac_type = lmac->lmac_type;
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- lmac_set_lane2sds(bgx, olmac);
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- } else {
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- olmac->lmac_type = lmac_type;
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- olmac->lane_to_sds = lane_to_sds;
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- }
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- lmac_set_training(bgx, olmac, olmac->lmacid);
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- }
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-}
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-
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-static bool is_dlm0_in_bgx_mode(struct bgx *bgx)
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-{
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- struct lmac *lmac;
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-
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- if (!bgx->is_dlm)
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- return true;
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-
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- lmac = &bgx->lmac[0];
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- if (lmac->lmac_type == BGX_MODE_INVALID)
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- return false;
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-
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- return true;
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+ cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG);
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+ lmac_type = (u8)((cmr_cfg >> 8) & 0x07);
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+ lane_to_sds = (u8)(cmr_cfg & 0xFF);
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+ /* Check if config is reset value */
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+ if ((lmac_type == 0) && (lane_to_sds == 0xE4))
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+ lmac->lmac_type = BGX_MODE_INVALID;
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+ else
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+ lmac->lmac_type = lmac_type;
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+ lmac->lane_to_sds = lane_to_sds;
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+ lmac_set_training(bgx, lmac, lmac->lmacid);
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}
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static void bgx_get_qlm_mode(struct bgx *bgx)
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{
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struct lmac *lmac;
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- struct lmac *lmac01;
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- struct lmac *lmac23;
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u8 idx;
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/* Init all LMAC's type to invalid */
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@@ -1081,29 +1042,9 @@ static void bgx_get_qlm_mode(struct bgx *bgx)
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if (bgx->lmac_count > bgx->max_lmac)
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bgx->lmac_count = bgx->max_lmac;
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- for (idx = 0; idx < bgx->max_lmac; idx++)
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- bgx_set_lmac_config(bgx, idx);
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-
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- if (!bgx->is_dlm || bgx->is_rgx) {
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- bgx_print_qlm_mode(bgx, 0);
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- return;
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- }
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-
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- if (bgx->lmac_count) {
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- bgx_print_qlm_mode(bgx, 0);
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- bgx_print_qlm_mode(bgx, 2);
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- }
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-
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- /* If DLM0 is not in BGX mode then LMAC0/1 have
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- * to be configured with serdes lanes of DLM1
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- */
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- if (is_dlm0_in_bgx_mode(bgx) || (bgx->lmac_count > 2))
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- return;
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for (idx = 0; idx < bgx->lmac_count; idx++) {
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- lmac01 = &bgx->lmac[idx];
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- lmac23 = &bgx->lmac[idx + 2];
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- lmac01->lmac_type = lmac23->lmac_type;
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- lmac01->lane_to_sds = lmac23->lane_to_sds;
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+ bgx_set_lmac_config(bgx, idx);
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+ bgx_print_qlm_mode(bgx, idx);
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}
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}
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