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@@ -41,6 +41,7 @@ struct rk_gmac_ops {
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void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
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void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
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void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
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+ void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);
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};
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struct rk_priv_data {
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@@ -52,6 +53,7 @@ struct rk_priv_data {
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bool clk_enabled;
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bool clock_input;
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+ bool integrated_phy;
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struct clk *clk_mac;
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struct clk *gmac_clkin;
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@@ -61,6 +63,9 @@ struct rk_priv_data {
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struct clk *clk_mac_refout;
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struct clk *aclk_mac;
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struct clk *pclk_mac;
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+ struct clk *clk_phy;
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+
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+ struct reset_control *phy_reset;
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int tx_delay;
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int rx_delay;
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@@ -750,9 +755,55 @@ static const struct rk_gmac_ops rk3399_ops = {
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.set_rmii_speed = rk3399_set_rmii_speed,
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};
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-static int gmac_clk_init(struct rk_priv_data *bsp_priv)
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+#define RK_GRF_MACPHY_CON0 0xb00
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+#define RK_GRF_MACPHY_CON1 0xb04
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+#define RK_GRF_MACPHY_CON2 0xb08
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+#define RK_GRF_MACPHY_CON3 0xb0c
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+
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+#define RK_MACPHY_ENABLE GRF_BIT(0)
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+#define RK_MACPHY_DISABLE GRF_CLR_BIT(0)
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+#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14)
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+#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7))
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+#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0)
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+#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0)
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+
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+static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv)
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+{
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+ if (priv->ops->integrated_phy_powerup)
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+ priv->ops->integrated_phy_powerup(priv);
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+
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);
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+
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);
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+
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+ if (priv->phy_reset) {
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+ /* PHY needs to be disabled before trying to reset it */
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
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+ if (priv->phy_reset)
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+ reset_control_assert(priv->phy_reset);
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+ usleep_range(10, 20);
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+ if (priv->phy_reset)
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+ reset_control_deassert(priv->phy_reset);
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+ usleep_range(10, 20);
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);
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+ msleep(30);
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+ }
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+}
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+
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+static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv)
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{
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+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
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+ if (priv->phy_reset)
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+ reset_control_assert(priv->phy_reset);
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+}
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+
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+static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
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+{
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+ struct rk_priv_data *bsp_priv = plat->bsp_priv;
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struct device *dev = &bsp_priv->pdev->dev;
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+ int ret;
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bsp_priv->clk_enabled = false;
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@@ -803,6 +854,16 @@ static int gmac_clk_init(struct rk_priv_data *bsp_priv)
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clk_set_rate(bsp_priv->clk_mac, 50000000);
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}
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+ if (plat->phy_node && bsp_priv->integrated_phy) {
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+ bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0);
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+ if (IS_ERR(bsp_priv->clk_phy)) {
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+ ret = PTR_ERR(bsp_priv->clk_phy);
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+ dev_err(dev, "Cannot get PHY clock: %d\n", ret);
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+ return -EINVAL;
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+ }
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+ clk_set_rate(bsp_priv->clk_phy, 50000000);
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+ }
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+
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return 0;
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}
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@@ -826,6 +887,9 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
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bsp_priv->clk_mac_refout);
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}
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+ if (!IS_ERR(bsp_priv->clk_phy))
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+ clk_prepare_enable(bsp_priv->clk_phy);
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+
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if (!IS_ERR(bsp_priv->aclk_mac))
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clk_prepare_enable(bsp_priv->aclk_mac);
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@@ -858,6 +922,9 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
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bsp_priv->clk_mac_refout);
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}
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+ if (!IS_ERR(bsp_priv->clk_phy))
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+ clk_disable_unprepare(bsp_priv->clk_phy);
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+
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if (!IS_ERR(bsp_priv->aclk_mac))
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clk_disable_unprepare(bsp_priv->aclk_mac);
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@@ -902,6 +969,7 @@ static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable)
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}
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static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
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+ struct plat_stmmacenet_data *plat,
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const struct rk_gmac_ops *ops)
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{
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struct rk_priv_data *bsp_priv;
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@@ -964,9 +1032,22 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
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bsp_priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,grf");
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- bsp_priv->pdev = pdev;
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- gmac_clk_init(bsp_priv);
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+ if (plat->phy_node) {
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+ bsp_priv->integrated_phy = of_property_read_bool(plat->phy_node,
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+ "phy-is-integrated");
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+ if (bsp_priv->integrated_phy) {
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+ bsp_priv->phy_reset = of_reset_control_get(plat->phy_node, NULL);
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+ if (IS_ERR(bsp_priv->phy_reset)) {
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+ dev_err(&pdev->dev, "No PHY reset control found.\n");
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+ bsp_priv->phy_reset = NULL;
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+ }
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+ }
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+ }
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+ dev_info(dev, "integrated PHY? (%s).\n",
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+ bsp_priv->integrated_phy ? "yes" : "no");
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+
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+ bsp_priv->pdev = pdev;
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return bsp_priv;
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}
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@@ -1014,6 +1095,9 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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+ if (bsp_priv->integrated_phy)
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+ rk_gmac_integrated_phy_powerup(bsp_priv);
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+
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return 0;
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}
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@@ -1021,6 +1105,9 @@ static void rk_gmac_powerdown(struct rk_priv_data *gmac)
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{
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struct device *dev = &gmac->pdev->dev;
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+ if (gmac->integrated_phy)
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+ rk_gmac_integrated_phy_powerdown(gmac);
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+
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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@@ -1072,12 +1159,16 @@ static int rk_gmac_probe(struct platform_device *pdev)
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plat_dat->has_gmac = true;
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plat_dat->fix_mac_speed = rk_fix_speed;
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- plat_dat->bsp_priv = rk_gmac_setup(pdev, data);
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+ plat_dat->bsp_priv = rk_gmac_setup(pdev, plat_dat, data);
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if (IS_ERR(plat_dat->bsp_priv)) {
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ret = PTR_ERR(plat_dat->bsp_priv);
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goto err_remove_config_dt;
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}
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+ ret = rk_gmac_clk_init(plat_dat);
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+ if (ret)
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+ return ret;
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+
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ret = rk_gmac_powerup(plat_dat->bsp_priv);
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if (ret)
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goto err_remove_config_dt;
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