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@@ -48,8 +48,8 @@ struct sh_msiof_spi_priv {
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const struct sh_msiof_chipdata *chipdata;
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struct sh_msiof_spi_info *info;
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struct completion done;
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- int tx_fifo_size;
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- int rx_fifo_size;
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+ unsigned int tx_fifo_size;
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+ unsigned int rx_fifo_size;
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void *tx_dma_page;
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void *rx_dma_page;
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dma_addr_t tx_dma_addr;
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@@ -95,8 +95,6 @@ struct sh_msiof_spi_priv {
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#define MDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */
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#define MDR2_GRPMASK1 0x00000001 /* Group Output Mask 1 (SH, A1) */
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-#define MAX_WDLEN 256U
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-
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/* TSCR and RSCR */
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#define SCR_BRPS_MASK 0x1f00 /* Prescaler Setting (1-32) */
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#define SCR_BRPS(i) (((i) - 1) << 8)
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@@ -850,7 +848,12 @@ static int sh_msiof_transfer_one(struct spi_master *master,
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* DMA supports 32-bit words only, hence pack 8-bit and 16-bit
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* words, with byte resp. word swapping.
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*/
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- unsigned int l = min(len, MAX_WDLEN * 4);
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+ unsigned int l = 0;
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+
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+ if (tx_buf)
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+ l = min(len, p->tx_fifo_size * 4);
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+ if (rx_buf)
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+ l = min(len, p->rx_fifo_size * 4);
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if (bits <= 8) {
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if (l & 3)
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@@ -963,7 +966,7 @@ static const struct sh_msiof_chipdata sh_data = {
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static const struct sh_msiof_chipdata r8a779x_data = {
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.tx_fifo_size = 64,
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- .rx_fifo_size = 256,
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+ .rx_fifo_size = 64,
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.master_flags = SPI_MASTER_MUST_TX,
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};
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