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@@ -161,14 +161,18 @@ enum spi_nor_protocol {
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SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1),
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SNOR_PROTO_1_1_2 = SNOR_PROTO_STR(1, 1, 2),
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SNOR_PROTO_1_1_4 = SNOR_PROTO_STR(1, 1, 4),
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+ SNOR_PROTO_1_1_8 = SNOR_PROTO_STR(1, 1, 8),
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SNOR_PROTO_1_2_2 = SNOR_PROTO_STR(1, 2, 2),
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SNOR_PROTO_1_4_4 = SNOR_PROTO_STR(1, 4, 4),
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+ SNOR_PROTO_1_8_8 = SNOR_PROTO_STR(1, 8, 8),
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SNOR_PROTO_2_2_2 = SNOR_PROTO_STR(2, 2, 2),
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SNOR_PROTO_4_4_4 = SNOR_PROTO_STR(4, 4, 4),
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+ SNOR_PROTO_8_8_8 = SNOR_PROTO_STR(8, 8, 8),
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SNOR_PROTO_1_1_1_DTR = SNOR_PROTO_DTR(1, 1, 1),
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SNOR_PROTO_1_2_2_DTR = SNOR_PROTO_DTR(1, 2, 2),
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SNOR_PROTO_1_4_4_DTR = SNOR_PROTO_DTR(1, 4, 4),
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+ SNOR_PROTO_1_8_8_DTR = SNOR_PROTO_DTR(1, 8, 8),
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};
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static inline bool spi_nor_protocol_is_dtr(enum spi_nor_protocol proto)
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@@ -308,10 +312,11 @@ struct spi_nor_hwcaps {
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/*
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*(Fast) Read capabilities.
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* MUST be ordered by priority: the higher bit position, the higher priority.
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- * As a matter of performances, it is relevant to use Quad SPI protocols first,
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- * then Dual SPI protocols before Fast Read and lastly (Slow) Read.
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+ * As a matter of performances, it is relevant to use Octo SPI protocols first,
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+ * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly
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+ * (Slow) Read.
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*/
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-#define SNOR_HWCAPS_READ_MASK GENMASK(10, 0)
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+#define SNOR_HWCAPS_READ_MASK GENMASK(14, 0)
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#define SNOR_HWCAPS_READ BIT(0)
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#define SNOR_HWCAPS_READ_FAST BIT(1)
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#define SNOR_HWCAPS_READ_1_1_1_DTR BIT(2)
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@@ -328,16 +333,22 @@ struct spi_nor_hwcaps {
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#define SNOR_HWCAPS_READ_4_4_4 BIT(9)
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#define SNOR_HWCAPS_READ_1_4_4_DTR BIT(10)
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+#define SNOR_HWCPAS_READ_OCTO GENMASK(14, 11)
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+#define SNOR_HWCAPS_READ_1_1_8 BIT(11)
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+#define SNOR_HWCAPS_READ_1_8_8 BIT(12)
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+#define SNOR_HWCAPS_READ_8_8_8 BIT(13)
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+#define SNOR_HWCAPS_READ_1_8_8_DTR BIT(14)
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+
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/*
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* Page Program capabilities.
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* MUST be ordered by priority: the higher bit position, the higher priority.
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- * Like (Fast) Read capabilities, Quad SPI protocols are preferred to the
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+ * Like (Fast) Read capabilities, Octo/Quad SPI protocols are preferred to the
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* legacy SPI 1-1-1 protocol.
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* Note that Dual Page Programs are not supported because there is no existing
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* JEDEC/SFDP standard to define them. Also at this moment no SPI flash memory
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* implements such commands.
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*/
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-#define SNOR_HWCAPS_PP_MASK GENMASK(19, 16)
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+#define SNOR_HWCAPS_PP_MASK GENMASK(22, 16)
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#define SNOR_HWCAPS_PP BIT(16)
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#define SNOR_HWCAPS_PP_QUAD GENMASK(19, 17)
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@@ -345,6 +356,11 @@ struct spi_nor_hwcaps {
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#define SNOR_HWCAPS_PP_1_4_4 BIT(18)
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#define SNOR_HWCAPS_PP_4_4_4 BIT(19)
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+#define SNOR_HWCAPS_PP_OCTO GENMASK(22, 20)
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+#define SNOR_HWCAPS_PP_1_1_8 BIT(20)
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+#define SNOR_HWCAPS_PP_1_8_8 BIT(21)
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+#define SNOR_HWCAPS_PP_8_8_8 BIT(22)
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+
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/**
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* spi_nor_scan() - scan the SPI NOR
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* @nor: the spi_nor structure
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