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Merge branch 'pm-cpufreq'

* pm-cpufreq:
  cpufreq / intel_pstate: Add kernel command line option disable intel_pstate.
  cpufreq / intel_pstate: Change to disallow module build
Rafael J. Wysocki 12 years ago
parent
commit
fdbe0946d4

+ 5 - 0
Documentation/kernel-parameters.txt

@@ -1131,6 +1131,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			0	disables intel_idle and fall back on acpi_idle.
 			0	disables intel_idle and fall back on acpi_idle.
 			1 to 6	specify maximum depth of C-state.
 			1 to 6	specify maximum depth of C-state.
 
 
+	intel_pstate=  [X86]
+		       disable
+		         Do not enable intel_pstate as the default
+		         scaling driver for the supported processors
+
 	intremap=	[X86-64, Intel-IOMMU]
 	intremap=	[X86-64, Intel-IOMMU]
 			on	enable Interrupt Remapping (default)
 			on	enable Interrupt Remapping (default)
 			off	disable Interrupt Remapping
 			off	disable Interrupt Remapping

+ 1 - 6
drivers/cpufreq/Kconfig.x86

@@ -3,7 +3,7 @@
 #
 #
 
 
 config X86_INTEL_PSTATE
 config X86_INTEL_PSTATE
-       tristate "Intel P state control"
+       bool "Intel P state control"
        depends on X86
        depends on X86
        help
        help
           This driver provides a P state for Intel core processors.
           This driver provides a P state for Intel core processors.
@@ -13,11 +13,6 @@ config X86_INTEL_PSTATE
 	  When this driver is enabled it will become the perferred
 	  When this driver is enabled it will become the perferred
           scaling driver for Sandy bridge processors.
           scaling driver for Sandy bridge processors.
 
 
-	  Note: This driver should be built with the same settings as
-	  the other scaling drivers configured into the system
-	  (module/built-in) in order for the driver to register itself
-	  as the scaling driver on the system.
-
 	  If in doubt, say N.
 	  If in doubt, say N.
 
 
 config X86_PCC_CPUFREQ
 config X86_PCC_CPUFREQ

+ 16 - 0
drivers/cpufreq/intel_pstate.c

@@ -773,11 +773,16 @@ static void intel_pstate_exit(void)
 }
 }
 module_exit(intel_pstate_exit);
 module_exit(intel_pstate_exit);
 
 
+static int __initdata no_load;
+
 static int __init intel_pstate_init(void)
 static int __init intel_pstate_init(void)
 {
 {
 	int rc = 0;
 	int rc = 0;
 	const struct x86_cpu_id *id;
 	const struct x86_cpu_id *id;
 
 
+	if (no_load)
+		return -ENODEV;
+
 	id = x86_match_cpu(intel_pstate_cpu_ids);
 	id = x86_match_cpu(intel_pstate_cpu_ids);
 	if (!id)
 	if (!id)
 		return -ENODEV;
 		return -ENODEV;
@@ -802,6 +807,17 @@ out:
 }
 }
 device_initcall(intel_pstate_init);
 device_initcall(intel_pstate_init);
 
 
+static int __init intel_pstate_setup(char *str)
+{
+	if (!str)
+		return -EINVAL;
+
+	if (!strcmp(str, "disable"))
+		no_load = 1;
+	return 0;
+}
+early_param("intel_pstate", intel_pstate_setup);
+
 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
 MODULE_LICENSE("GPL");
 MODULE_LICENSE("GPL");