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@@ -68,12 +68,29 @@ static void ep93xx_gpio_update_int_params(struct ep93xx_gpio *epg, unsigned port
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epg->base + int_en_register_offset[port]);
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}
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-static void ep93xx_gpio_int_debounce(struct ep93xx_gpio *epg,
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- unsigned int irq, bool enable)
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+static int ep93xx_gpio_port(struct gpio_chip *gc)
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{
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- int line = irq_to_gpio(irq);
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- int port = line >> 3;
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- int port_mask = 1 << (line & 7);
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+ struct ep93xx_gpio *epg = gpiochip_get_data(gc);
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+ int port = 0;
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+
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+ while (gc != &epg->gc[port] && port < sizeof(epg->gc))
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+ port++;
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+
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+ /* This should not happen but is there as a last safeguard */
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+ if (gc != &epg->gc[port]) {
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+ pr_crit("can't find the GPIO port\n");
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+ return 0;
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+ }
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+
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+ return port;
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+}
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+
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+static void ep93xx_gpio_int_debounce(struct gpio_chip *gc,
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+ unsigned int offset, bool enable)
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+{
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+ struct ep93xx_gpio *epg = gpiochip_get_data(gc);
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+ int port = ep93xx_gpio_port(gc);
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+ int port_mask = BIT(offset);
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if (enable)
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gpio_int_debounce[port] |= port_mask;
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@@ -331,19 +348,13 @@ static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = {
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static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset,
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unsigned long config)
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{
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- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
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- int gpio = gc->base + offset;
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- int irq = gpio_to_irq(gpio);
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u32 debounce;
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if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
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return -ENOTSUPP;
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- if (irq < 0)
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- return -EINVAL;
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-
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debounce = pinconf_to_config_argument(config);
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- ep93xx_gpio_int_debounce(epg, irq, debounce ? true : false);
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+ ep93xx_gpio_int_debounce(gc, offset, debounce ? true : false);
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return 0;
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}
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