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@@ -19,6 +19,7 @@
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#include <linux/mfd/syscon.h>
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#include <dt-bindings/power/rk3288-power.h>
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#include <dt-bindings/power/rk3368-power.h>
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+#include <dt-bindings/power/rk3399-power.h>
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struct rockchip_domain_info {
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int pwr_mask;
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@@ -79,6 +80,9 @@ struct rockchip_pmu {
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#define DOMAIN_RK3368(pwr, status, req) \
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DOMAIN(pwr, status, req, (req) + 16, req)
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+#define DOMAIN_RK3399(pwr, status, req) \
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+ DOMAIN(pwr, status, req, req, req)
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+
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static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
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{
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struct rockchip_pmu *pmu = pd->pmu;
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@@ -530,6 +534,36 @@ static const struct rockchip_domain_info rk3368_pm_domains[] = {
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[RK3368_PD_GPU_1] = DOMAIN_RK3368(17, 16, 2),
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};
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+static const struct rockchip_domain_info rk3399_pm_domains[] = {
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+ [RK3399_PD_TCPD0] = DOMAIN_RK3399(8, 8, -1),
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+ [RK3399_PD_TCPD1] = DOMAIN_RK3399(9, 9, -1),
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+ [RK3399_PD_CCI] = DOMAIN_RK3399(10, 10, -1),
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+ [RK3399_PD_CCI0] = DOMAIN_RK3399(-1, -1, 15),
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+ [RK3399_PD_CCI1] = DOMAIN_RK3399(-1, -1, 16),
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+ [RK3399_PD_PERILP] = DOMAIN_RK3399(11, 11, 1),
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+ [RK3399_PD_PERIHP] = DOMAIN_RK3399(12, 12, 2),
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+ [RK3399_PD_CENTER] = DOMAIN_RK3399(13, 13, 14),
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+ [RK3399_PD_VIO] = DOMAIN_RK3399(14, 14, 17),
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+ [RK3399_PD_GPU] = DOMAIN_RK3399(15, 15, 0),
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+ [RK3399_PD_VCODEC] = DOMAIN_RK3399(16, 16, 3),
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+ [RK3399_PD_VDU] = DOMAIN_RK3399(17, 17, 4),
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+ [RK3399_PD_RGA] = DOMAIN_RK3399(18, 18, 5),
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+ [RK3399_PD_IEP] = DOMAIN_RK3399(19, 19, 6),
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+ [RK3399_PD_VO] = DOMAIN_RK3399(20, 20, -1),
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+ [RK3399_PD_VOPB] = DOMAIN_RK3399(-1, -1, 7),
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+ [RK3399_PD_VOPL] = DOMAIN_RK3399(-1, -1, 8),
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+ [RK3399_PD_ISP0] = DOMAIN_RK3399(22, 22, 9),
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+ [RK3399_PD_ISP1] = DOMAIN_RK3399(23, 23, 10),
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+ [RK3399_PD_HDCP] = DOMAIN_RK3399(24, 24, 11),
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+ [RK3399_PD_GMAC] = DOMAIN_RK3399(25, 25, 23),
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+ [RK3399_PD_EMMC] = DOMAIN_RK3399(26, 26, 24),
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+ [RK3399_PD_USB3] = DOMAIN_RK3399(27, 27, 12),
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+ [RK3399_PD_EDP] = DOMAIN_RK3399(28, 28, 22),
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+ [RK3399_PD_GIC] = DOMAIN_RK3399(29, 29, 27),
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+ [RK3399_PD_SD] = DOMAIN_RK3399(30, 30, 28),
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+ [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399(31, 31, 29),
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+};
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+
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static const struct rockchip_pmu_info rk3288_pmu = {
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.pwr_offset = 0x08,
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.status_offset = 0x0c,
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@@ -564,6 +598,23 @@ static const struct rockchip_pmu_info rk3368_pmu = {
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.domain_info = rk3368_pm_domains,
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};
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+static const struct rockchip_pmu_info rk3399_pmu = {
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+ .pwr_offset = 0x14,
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+ .status_offset = 0x18,
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+ .req_offset = 0x60,
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+ .idle_offset = 0x64,
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+ .ack_offset = 0x68,
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+
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+ .core_pwrcnt_offset = 0x9c,
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+ .gpu_pwrcnt_offset = 0xa4,
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+
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+ .core_power_transition_time = 24,
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+ .gpu_power_transition_time = 24,
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+
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+ .num_domains = ARRAY_SIZE(rk3399_pm_domains),
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+ .domain_info = rk3399_pm_domains,
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+};
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+
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static const struct of_device_id rockchip_pm_domain_dt_match[] = {
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{
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.compatible = "rockchip,rk3288-power-controller",
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@@ -573,6 +624,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
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.compatible = "rockchip,rk3368-power-controller",
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.data = (void *)&rk3368_pmu,
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},
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+ {
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+ .compatible = "rockchip,rk3399-power-controller",
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+ .data = (void *)&rk3399_pmu,
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+ },
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{ /* sentinel */ },
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};
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