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@@ -22,6 +22,7 @@
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*/
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*/
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#include <linux/firmware.h>
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#include <linux/firmware.h>
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#include <drm/drmP.h>
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#include <drm/drmP.h>
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+#include <drm/drm_cache.h>
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#include "amdgpu.h"
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#include "amdgpu.h"
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#include "gmc_v8_0.h"
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#include "gmc_v8_0.h"
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#include "amdgpu_ucode.h"
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#include "amdgpu_ucode.h"
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@@ -1085,6 +1086,7 @@ static int gmc_v8_0_sw_init(void *handle)
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*/
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*/
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adev->need_dma32 = false;
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adev->need_dma32 = false;
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dma_bits = adev->need_dma32 ? 32 : 40;
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dma_bits = adev->need_dma32 ? 32 : 40;
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+ adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
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r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
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r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
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if (r) {
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if (r) {
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adev->need_dma32 = true;
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adev->need_dma32 = true;
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@@ -1096,6 +1098,7 @@ static int gmc_v8_0_sw_init(void *handle)
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pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
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pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
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pr_warn("amdgpu: No coherent DMA available\n");
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pr_warn("amdgpu: No coherent DMA available\n");
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}
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}
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+ adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
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r = gmc_v8_0_init_microcode(adev);
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r = gmc_v8_0_init_microcode(adev);
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if (r) {
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if (r) {
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