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@@ -45,6 +45,7 @@ enum dw_pci_ctl_id_t {
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medfield,
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merrifield,
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baytrail,
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+ cherrytrail,
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haswell,
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};
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@@ -63,6 +64,7 @@ struct dw_pci_controller {
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u32 rx_fifo_depth;
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u32 clk_khz;
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u32 functionality;
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+ u32 flags;
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struct dw_scl_sda_cfg *scl_sda_cfg;
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int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
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};
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@@ -170,6 +172,15 @@ static struct dw_pci_controller dw_pci_controllers[] = {
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.functionality = I2C_FUNC_10BIT_ADDR,
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.scl_sda_cfg = &hsw_config,
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},
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+ [cherrytrail] = {
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+ .bus_num = -1,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .functionality = I2C_FUNC_10BIT_ADDR,
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+ .flags = MODEL_CHERRYTRAIL,
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+ .scl_sda_cfg = &byt_config,
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+ },
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};
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#ifdef CONFIG_PM
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@@ -237,6 +248,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
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dev->base = pcim_iomap_table(pdev)[0];
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dev->dev = &pdev->dev;
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dev->irq = pdev->irq;
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+ dev->flags |= controller->flags;
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if (controller->setup) {
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r = controller->setup(pdev, controller);
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@@ -317,13 +329,13 @@ static const struct pci_device_id i2_designware_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x9c61), haswell },
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{ PCI_VDEVICE(INTEL, 0x9c62), haswell },
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/* Braswell / Cherrytrail */
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- { PCI_VDEVICE(INTEL, 0x22C1), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C2), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C3), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C4), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C5), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C6), baytrail },
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- { PCI_VDEVICE(INTEL, 0x22C7), baytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
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+ { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
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{ 0,}
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};
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MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
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