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@@ -253,52 +253,6 @@ static inline void clwb(volatile void *__p)
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: [pax] "a" (p));
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}
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-/**
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- * pcommit_sfence() - persistent commit and fence
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- *
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- * The PCOMMIT instruction ensures that data that has been flushed from the
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- * processor's cache hierarchy with CLWB, CLFLUSHOPT or CLFLUSH is accepted to
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- * memory and is durable on the DIMM. The primary use case for this is
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- * persistent memory.
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- *
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- * This function shows how to properly use CLWB/CLFLUSHOPT/CLFLUSH and PCOMMIT
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- * with appropriate fencing.
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- *
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- * Example:
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- * void flush_and_commit_buffer(void *vaddr, unsigned int size)
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- * {
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- * unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
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- * void *vend = vaddr + size;
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- * void *p;
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- *
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- * for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
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- * p < vend; p += boot_cpu_data.x86_clflush_size)
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- * clwb(p);
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- *
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- * // SFENCE to order CLWB/CLFLUSHOPT/CLFLUSH cache flushes
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- * // MFENCE via mb() also works
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- * wmb();
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- *
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- * // PCOMMIT and the required SFENCE for ordering
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- * pcommit_sfence();
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- * }
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- *
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- * After this function completes the data pointed to by 'vaddr' has been
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- * accepted to memory and will be durable if the 'vaddr' points to persistent
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- * memory.
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- *
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- * PCOMMIT must always be ordered by an MFENCE or SFENCE, so to help simplify
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- * things we include both the PCOMMIT and the required SFENCE in the
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- * alternatives generated by pcommit_sfence().
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- */
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-static inline void pcommit_sfence(void)
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-{
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- alternative(ASM_NOP7,
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- ".byte 0x66, 0x0f, 0xae, 0xf8\n\t" /* pcommit */
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- "sfence",
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- X86_FEATURE_PCOMMIT);
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-}
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-
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#define nop() asm volatile ("nop")
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