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@@ -181,9 +181,6 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
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{
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int i;
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- dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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- __FILE__, __LINE__, __func__);
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-
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for (i = 0; i < denali->max_banks; i++)
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iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
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denali->flash_reg + INTR_STATUS(i));
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@@ -233,9 +230,6 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
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uint16_t acc_clks;
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uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
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- dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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- __FILE__, __LINE__, __func__);
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-
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en_lo = CEIL_DIV(Trp[mode], CLK_X);
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en_hi = CEIL_DIV(Treh[mode], CLK_X);
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#if ONFI_BLOOM_TIME
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@@ -480,9 +474,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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uint8_t maf_id, device_id;
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int i;
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- dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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- __FILE__, __LINE__, __func__);
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-
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/*
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* Use read id method to get device ID and other params.
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* For some NAND chips, controller can't report the correct
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@@ -537,9 +528,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
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static void denali_set_intr_modes(struct denali_nand_info *denali,
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uint16_t INT_ENABLE)
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{
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- dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
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- __FILE__, __LINE__, __func__);
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-
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if (INT_ENABLE)
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iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE);
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else
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