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@@ -1487,7 +1487,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
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if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS &&
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intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
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- DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe));
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+ DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
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}
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/* Consume port. Then clear IIR or we'll miss events */
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@@ -1564,12 +1564,12 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
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if (pch_iir & SDE_TRANSA_FIFO_UNDER)
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if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
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false))
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- DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n");
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+ DRM_ERROR("PCH transcoder A FIFO underrun\n");
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if (pch_iir & SDE_TRANSB_FIFO_UNDER)
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if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B,
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false))
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- DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n");
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+ DRM_ERROR("PCH transcoder B FIFO underrun\n");
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}
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static void ivb_err_int_handler(struct drm_device *dev)
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@@ -1585,8 +1585,8 @@ static void ivb_err_int_handler(struct drm_device *dev)
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if (err_int & ERR_INT_FIFO_UNDERRUN(pipe)) {
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if (intel_set_cpu_fifo_underrun_reporting(dev, pipe,
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false))
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- DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n",
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- pipe_name(pipe));
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+ DRM_ERROR("Pipe %c FIFO underrun\n",
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+ pipe_name(pipe));
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}
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if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) {
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@@ -1611,17 +1611,17 @@ static void cpt_serr_int_handler(struct drm_device *dev)
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if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
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if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
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false))
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- DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n");
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+ DRM_ERROR("PCH transcoder A FIFO underrun\n");
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if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
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if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B,
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false))
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- DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n");
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+ DRM_ERROR("PCH transcoder B FIFO underrun\n");
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if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
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if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_C,
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false))
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- DRM_DEBUG_DRIVER("PCH transcoder C FIFO underrun\n");
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+ DRM_ERROR("PCH transcoder C FIFO underrun\n");
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I915_WRITE(SERR_INT, serr_int);
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}
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@@ -1683,8 +1683,8 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
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if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
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if (intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
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- DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n",
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- pipe_name(pipe));
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+ DRM_ERROR("Pipe %c FIFO underrun\n",
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+ pipe_name(pipe));
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if (de_iir & DE_PIPE_CRC_DONE(pipe))
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i9xx_pipe_crc_irq_handler(dev, pipe);
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@@ -1885,8 +1885,8 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
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if (pipe_iir & GEN8_PIPE_FIFO_UNDERRUN) {
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if (intel_set_cpu_fifo_underrun_reporting(dev, pipe,
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false))
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- DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n",
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- pipe_name(pipe));
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+ DRM_ERROR("Pipe %c FIFO underrun\n",
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+ pipe_name(pipe));
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}
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if (pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS) {
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@@ -3239,7 +3239,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
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if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS &&
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intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
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- DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe));
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+ DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
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}
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iir = new_iir;
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@@ -3437,7 +3437,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
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if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS &&
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intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
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- DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe));
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+ DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
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}
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if (blc_event || (iir & I915_ASLE_INTERRUPT))
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@@ -3682,7 +3682,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
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if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS &&
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intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
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- DRM_DEBUG_DRIVER("pipe %c underrun\n", pipe_name(pipe));
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+ DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
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}
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if (blc_event || (iir & I915_ASLE_INTERRUPT))
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