|
@@ -618,7 +618,7 @@ static inline void fsl_qspi_invalid(struct fsl_qspi *q)
|
|
|
qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
|
|
|
}
|
|
|
|
|
|
-static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
|
|
|
+static ssize_t fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
|
|
|
u8 opcode, unsigned int to, u32 *txbuf,
|
|
|
unsigned count, size_t *retlen)
|
|
|
{
|
|
@@ -647,8 +647,11 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
|
|
|
/* Trigger it */
|
|
|
ret = fsl_qspi_runcmd(q, opcode, to, count);
|
|
|
|
|
|
- if (ret == 0 && retlen)
|
|
|
- *retlen += count;
|
|
|
+ if (ret == 0) {
|
|
|
+ if (retlen)
|
|
|
+ *retlen += count;
|
|
|
+ return count;
|
|
|
+ }
|
|
|
|
|
|
return ret;
|
|
|
}
|
|
@@ -860,6 +863,8 @@ static int fsl_qspi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
|
|
|
} else if (len > 0) {
|
|
|
ret = fsl_qspi_nor_write(q, nor, opcode, 0,
|
|
|
(u32 *)buf, len, NULL);
|
|
|
+ if (ret > 0)
|
|
|
+ return 0;
|
|
|
} else {
|
|
|
dev_err(q->dev, "invalid cmd %d\n", opcode);
|
|
|
ret = -EINVAL;
|
|
@@ -873,12 +878,12 @@ static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to,
|
|
|
{
|
|
|
struct fsl_qspi *q = nor->priv;
|
|
|
|
|
|
- fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
|
|
|
+ ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
|
|
|
(u32 *)buf, len, retlen);
|
|
|
|
|
|
/* invalid the data in the AHB buffer. */
|
|
|
fsl_qspi_invalid(q);
|
|
|
- return 0;
|
|
|
+ return ret;
|
|
|
}
|
|
|
|
|
|
static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
|
|
@@ -925,7 +930,7 @@ static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
|
|
|
len);
|
|
|
|
|
|
*retlen += len;
|
|
|
- return 0;
|
|
|
+ return len;
|
|
|
}
|
|
|
|
|
|
static int fsl_qspi_erase(struct spi_nor *nor, loff_t offs)
|