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@@ -14,16 +14,72 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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+#include <linux/irqdomain.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <linux/syscore_ops.h>
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#include <linux/syscore_ops.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/irq.h>
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+#include <asm/exception.h>
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#include "generic.h"
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#include "generic.h"
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+/*
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+ * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
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+ * this is for internal IRQs i.e. from IRQ LCD to RTCAlrm.
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+ */
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+static void sa1100_mask_irq(struct irq_data *d)
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+{
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+ ICMR &= ~BIT(d->hwirq);
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+}
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+
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+static void sa1100_unmask_irq(struct irq_data *d)
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+{
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+ ICMR |= BIT(d->hwirq);
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+}
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+
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+/*
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+ * Apart form GPIOs, only the RTC alarm can be a wakeup event.
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+ */
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+static int sa1100_set_wake(struct irq_data *d, unsigned int on)
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+{
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+ if (BIT(d->hwirq) == IC_RTCAlrm) {
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+ if (on)
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+ PWER |= PWER_RTC;
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+ else
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+ PWER &= ~PWER_RTC;
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+ return 0;
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+ }
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+ return -EINVAL;
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+}
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+
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+static struct irq_chip sa1100_normal_chip = {
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+ .name = "SC",
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+ .irq_ack = sa1100_mask_irq,
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+ .irq_mask = sa1100_mask_irq,
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+ .irq_unmask = sa1100_unmask_irq,
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+ .irq_set_wake = sa1100_set_wake,
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+};
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+
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+static int sa1100_normal_irqdomain_map(struct irq_domain *d,
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+ unsigned int irq, irq_hw_number_t hwirq)
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+{
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+ irq_set_chip_and_handler(irq, &sa1100_normal_chip,
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+ handle_level_irq);
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+ set_irq_flags(irq, IRQF_VALID);
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+
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+ return 0;
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+}
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+
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+static struct irq_domain_ops sa1100_normal_irqdomain_ops = {
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+ .map = sa1100_normal_irqdomain_map,
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+ .xlate = irq_domain_xlate_onetwocell,
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+};
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+
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+static struct irq_domain *sa1100_normal_irqdomain;
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+
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/*
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/*
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* SA1100 GPIO edge detection for IRQs:
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* SA1100 GPIO edge detection for IRQs:
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* IRQs are generated on Falling-Edge, Rising-Edge, or both.
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* IRQs are generated on Falling-Edge, Rising-Edge, or both.
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@@ -33,20 +89,11 @@ static int GPIO_IRQ_rising_edge;
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static int GPIO_IRQ_falling_edge;
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static int GPIO_IRQ_falling_edge;
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static int GPIO_IRQ_mask = (1 << 11) - 1;
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static int GPIO_IRQ_mask = (1 << 11) - 1;
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-/*
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- * To get the GPIO number from an IRQ number
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- */
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-#define GPIO_11_27_IRQ(i) ((i) - 21)
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-#define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq))
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-
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static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
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static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
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{
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{
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unsigned int mask;
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unsigned int mask;
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- if (d->irq <= 10)
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- mask = 1 << d->irq;
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- else
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- mask = GPIO11_27_MASK(d->irq);
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+ mask = BIT(d->hwirq);
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if (type == IRQ_TYPE_PROBE) {
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if (type == IRQ_TYPE_PROBE) {
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if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
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if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
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@@ -70,41 +117,51 @@ static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
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}
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}
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/*
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/*
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- * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10.
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+ * GPIO IRQs must be acknowledged.
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*/
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*/
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-static void sa1100_low_gpio_ack(struct irq_data *d)
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-{
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- GEDR = (1 << d->irq);
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-}
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-
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-static void sa1100_low_gpio_mask(struct irq_data *d)
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-{
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- ICMR &= ~(1 << d->irq);
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-}
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-
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-static void sa1100_low_gpio_unmask(struct irq_data *d)
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+static void sa1100_gpio_ack(struct irq_data *d)
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{
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{
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- ICMR |= 1 << d->irq;
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+ GEDR = BIT(d->hwirq);
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}
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}
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-static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on)
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+static int sa1100_gpio_wake(struct irq_data *d, unsigned int on)
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{
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{
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if (on)
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if (on)
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- PWER |= 1 << d->irq;
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+ PWER |= BIT(d->hwirq);
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else
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else
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- PWER &= ~(1 << d->irq);
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+ PWER &= ~BIT(d->hwirq);
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return 0;
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return 0;
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}
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}
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+/*
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+ * This is for IRQs from 0 to 10.
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+ */
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static struct irq_chip sa1100_low_gpio_chip = {
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static struct irq_chip sa1100_low_gpio_chip = {
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.name = "GPIO-l",
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.name = "GPIO-l",
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- .irq_ack = sa1100_low_gpio_ack,
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- .irq_mask = sa1100_low_gpio_mask,
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- .irq_unmask = sa1100_low_gpio_unmask,
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+ .irq_ack = sa1100_gpio_ack,
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+ .irq_mask = sa1100_mask_irq,
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+ .irq_unmask = sa1100_unmask_irq,
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.irq_set_type = sa1100_gpio_type,
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.irq_set_type = sa1100_gpio_type,
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- .irq_set_wake = sa1100_low_gpio_wake,
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+ .irq_set_wake = sa1100_gpio_wake,
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+};
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+
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+static int sa1100_low_gpio_irqdomain_map(struct irq_domain *d,
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+ unsigned int irq, irq_hw_number_t hwirq)
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+{
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+ irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip,
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+ handle_edge_irq);
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+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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+
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+ return 0;
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+}
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+
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+static struct irq_domain_ops sa1100_low_gpio_irqdomain_ops = {
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+ .map = sa1100_low_gpio_irqdomain_map,
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+ .xlate = irq_domain_xlate_onetwocell,
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};
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};
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+static struct irq_domain *sa1100_low_gpio_irqdomain;
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+
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/*
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/*
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* IRQ11 (GPIO11 through 27) handler. We enter here with the
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* IRQ11 (GPIO11 through 27) handler. We enter here with the
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* irq_controller_lock held, and IRQs disabled. Decode the IRQ
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* irq_controller_lock held, and IRQs disabled. Decode the IRQ
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@@ -141,16 +198,9 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
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* In addition, the IRQs are all collected up into one bit in the
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* In addition, the IRQs are all collected up into one bit in the
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* interrupt controller registers.
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* interrupt controller registers.
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*/
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*/
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-static void sa1100_high_gpio_ack(struct irq_data *d)
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-{
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- unsigned int mask = GPIO11_27_MASK(d->irq);
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-
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- GEDR = mask;
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-}
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-
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static void sa1100_high_gpio_mask(struct irq_data *d)
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static void sa1100_high_gpio_mask(struct irq_data *d)
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{
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{
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- unsigned int mask = GPIO11_27_MASK(d->irq);
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+ unsigned int mask = BIT(d->hwirq);
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GPIO_IRQ_mask &= ~mask;
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GPIO_IRQ_mask &= ~mask;
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@@ -160,7 +210,7 @@ static void sa1100_high_gpio_mask(struct irq_data *d)
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static void sa1100_high_gpio_unmask(struct irq_data *d)
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static void sa1100_high_gpio_unmask(struct irq_data *d)
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{
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{
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- unsigned int mask = GPIO11_27_MASK(d->irq);
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+ unsigned int mask = BIT(d->hwirq);
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GPIO_IRQ_mask |= mask;
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GPIO_IRQ_mask |= mask;
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@@ -168,61 +218,32 @@ static void sa1100_high_gpio_unmask(struct irq_data *d)
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GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
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GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
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}
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}
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-static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on)
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-{
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- if (on)
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- PWER |= GPIO11_27_MASK(d->irq);
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- else
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- PWER &= ~GPIO11_27_MASK(d->irq);
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- return 0;
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-}
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-
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static struct irq_chip sa1100_high_gpio_chip = {
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static struct irq_chip sa1100_high_gpio_chip = {
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.name = "GPIO-h",
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.name = "GPIO-h",
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- .irq_ack = sa1100_high_gpio_ack,
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+ .irq_ack = sa1100_gpio_ack,
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.irq_mask = sa1100_high_gpio_mask,
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.irq_mask = sa1100_high_gpio_mask,
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.irq_unmask = sa1100_high_gpio_unmask,
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.irq_unmask = sa1100_high_gpio_unmask,
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.irq_set_type = sa1100_gpio_type,
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.irq_set_type = sa1100_gpio_type,
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- .irq_set_wake = sa1100_high_gpio_wake,
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+ .irq_set_wake = sa1100_gpio_wake,
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};
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};
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-/*
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- * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
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- * this is for internal IRQs i.e. from 11 to 31.
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- */
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-static void sa1100_mask_irq(struct irq_data *d)
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-{
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- ICMR &= ~(1 << d->irq);
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-}
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-
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-static void sa1100_unmask_irq(struct irq_data *d)
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+static int sa1100_high_gpio_irqdomain_map(struct irq_domain *d,
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+ unsigned int irq, irq_hw_number_t hwirq)
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{
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{
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- ICMR |= (1 << d->irq);
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-}
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+ irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip,
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+ handle_edge_irq);
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+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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-/*
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- * Apart form GPIOs, only the RTC alarm can be a wakeup event.
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- */
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-static int sa1100_set_wake(struct irq_data *d, unsigned int on)
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-{
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- if (d->irq == IRQ_RTCAlrm) {
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- if (on)
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- PWER |= PWER_RTC;
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- else
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- PWER &= ~PWER_RTC;
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- return 0;
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- }
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- return -EINVAL;
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+ return 0;
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}
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}
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-static struct irq_chip sa1100_normal_chip = {
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- .name = "SC",
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- .irq_ack = sa1100_mask_irq,
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- .irq_mask = sa1100_mask_irq,
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- .irq_unmask = sa1100_unmask_irq,
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- .irq_set_wake = sa1100_set_wake,
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+static struct irq_domain_ops sa1100_high_gpio_irqdomain_ops = {
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+ .map = sa1100_high_gpio_irqdomain_map,
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+ .xlate = irq_domain_xlate_onetwocell,
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};
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};
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+static struct irq_domain *sa1100_high_gpio_irqdomain;
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+
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static struct resource irq_resource =
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static struct resource irq_resource =
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DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
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DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
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@@ -291,10 +312,25 @@ static int __init sa1100irq_init_devicefs(void)
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device_initcall(sa1100irq_init_devicefs);
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device_initcall(sa1100irq_init_devicefs);
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-void __init sa1100_init_irq(void)
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+static asmlinkage void __exception_irq_entry
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+sa1100_handle_irq(struct pt_regs *regs)
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{
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{
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- unsigned int irq;
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+ uint32_t icip, icmr, mask;
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+
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+ do {
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+ icip = (ICIP);
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+ icmr = (ICMR);
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+ mask = icip & icmr;
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+
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+ if (mask == 0)
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+ break;
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+
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+ handle_IRQ(ffs(mask) - 1 + IRQ_GPIO0, regs);
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+ } while (1);
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+}
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+void __init sa1100_init_irq(void)
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+{
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request_resource(&iomem_resource, &irq_resource);
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request_resource(&iomem_resource, &irq_resource);
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/* disable all IRQs */
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/* disable all IRQs */
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@@ -314,29 +350,24 @@ void __init sa1100_init_irq(void)
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*/
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*/
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ICCR = 1;
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ICCR = 1;
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- for (irq = 0; irq <= 10; irq++) {
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- irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip,
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- handle_edge_irq);
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- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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- }
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+ sa1100_low_gpio_irqdomain = irq_domain_add_legacy(NULL,
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+ 11, IRQ_GPIO0, 0,
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+ &sa1100_low_gpio_irqdomain_ops, NULL);
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- for (irq = 12; irq <= 31; irq++) {
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- irq_set_chip_and_handler(irq, &sa1100_normal_chip,
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- handle_level_irq);
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- set_irq_flags(irq, IRQF_VALID);
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- }
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+ sa1100_normal_irqdomain = irq_domain_add_legacy(NULL,
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+ 21, IRQ_GPIO11_27, 11,
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+ &sa1100_normal_irqdomain_ops, NULL);
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- for (irq = 32; irq <= 48; irq++) {
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- irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip,
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- handle_edge_irq);
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- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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- }
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+ sa1100_high_gpio_irqdomain = irq_domain_add_legacy(NULL,
|
|
|
|
+ 17, IRQ_GPIO11, 11,
|
|
|
|
+ &sa1100_high_gpio_irqdomain_ops, NULL);
|
|
|
|
|
|
/*
|
|
/*
|
|
* Install handler for GPIO 11-27 edge detect interrupts
|
|
* Install handler for GPIO 11-27 edge detect interrupts
|
|
*/
|
|
*/
|
|
- irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
|
|
|
|
irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
|
|
irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
|
|
|
|
|
|
|
|
+ set_handle_irq(sa1100_handle_irq);
|
|
|
|
+
|
|
sa1100_init_gpio();
|
|
sa1100_init_gpio();
|
|
}
|
|
}
|