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@@ -1842,8 +1842,8 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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* These bits say the device is running, and should keep running for
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* at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
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* but they do not indicate that embedded SRAM is restored yet;
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- * 3945 and 4965 have volatile SRAM, and must save/restore contents
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- * to/from host DRAM when sleeping/waking for power-saving.
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+ * HW with volatile SRAM must save/restore contents to/from
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+ * host DRAM when sleeping/waking for power-saving.
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* Each direction takes approximately 1/4 millisecond; with this
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* overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
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* series of register accesses are expected (e.g. reading Event Log),
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@@ -1851,8 +1851,9 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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*
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* CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
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* SRAM is okay/restored. We don't check that here because this call
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- * is just for hardware register access; but GP1 MAC_SLEEP check is a
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- * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
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+ * is just for hardware register access; but GP1 MAC_SLEEP
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+ * check is a good idea before accessing the SRAM of HW with
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+ * volatile SRAM (e.g. reading Event Log).
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*
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* 5000 series and later (including 1000 series) have non-volatile SRAM,
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* and do not save/restore SRAM when power cycling.
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