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clk: qcom: gdsc: Add support for ALWAYS_ON gdscs

Some GDSCs might have software control to turn them off, but we might
want to keep them enabled always, in some cases because of lack of
support in kernel to handle a graceful turning off/on of such GDSCs.
Most common instances would be the GDCSs which power up the noc/bus
fabrics, which need bus drivers to handle them and atleast support for
which is missing on all qcom SoCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Rajendra Nayak 7 years ago
parent
commit
fb55bea1fe
2 changed files with 9 additions and 0 deletions
  1. 8 0
      drivers/clk/qcom/gdsc.c
  2. 1 0
      drivers/clk/qcom/gdsc.h

+ 8 - 0
drivers/clk/qcom/gdsc.c

@@ -291,6 +291,14 @@ static int gdsc_init(struct gdsc *sc)
 	if ((sc->flags & VOTABLE) && on)
 		gdsc_enable(&sc->pd);
 
+	/* If ALWAYS_ON GDSCs are not ON, turn them ON */
+	if (sc->flags & ALWAYS_ON) {
+		if (!on)
+			gdsc_enable(&sc->pd);
+		on = true;
+		sc->pd.flags |= GENPD_FLAG_ALWAYS_ON;
+	}
+
 	if (on || (sc->pwrsts & PWRSTS_RET))
 		gdsc_force_mem_on(sc);
 	else

+ 1 - 0
drivers/clk/qcom/gdsc.h

@@ -53,6 +53,7 @@ struct gdsc {
 #define VOTABLE		BIT(0)
 #define CLAMP_IO	BIT(1)
 #define HW_CTRL		BIT(2)
+#define ALWAYS_ON	BIT(3)
 	struct reset_controller_dev	*rcdev;
 	unsigned int			*resets;
 	unsigned int			reset_count;