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@@ -21,14 +21,12 @@
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#define CPU_RESET 0x00000002
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#define CPU_RESET 0x00000002
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#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
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#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
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-#define WDT_RESET_OUT_EN 0x00000002
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#define SOFT_RESET_OUT_EN 0x00000004
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#define SOFT_RESET_OUT_EN 0x00000004
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
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#define SOFT_RESET 0x00000001
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#define SOFT_RESET 0x00000001
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110)
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110)
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-#define WDT_INT_REQ 0x0008
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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