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@@ -54,6 +54,9 @@ static u64 __ro_after_init x86_spec_ctrl_mask = SPEC_CTRL_IBRS;
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u64 __ro_after_init x86_amd_ls_cfg_base;
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u64 __ro_after_init x86_amd_ls_cfg_ssbd_mask;
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+/* Control conditional STIPB in switch_to() */
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+DEFINE_STATIC_KEY_FALSE(switch_to_cond_stibp);
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+
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void __init check_bugs(void)
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{
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identify_boot_cpu();
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@@ -199,6 +202,9 @@ static void x86_amd_ssb_disable(void)
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static enum spectre_v2_mitigation spectre_v2_enabled __ro_after_init =
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SPECTRE_V2_NONE;
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+static enum spectre_v2_user_mitigation spectre_v2_user __ro_after_init =
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+ SPECTRE_V2_USER_NONE;
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+
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#ifdef RETPOLINE
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static bool spectre_v2_bad_module;
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@@ -237,6 +243,104 @@ enum spectre_v2_mitigation_cmd {
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SPECTRE_V2_CMD_RETPOLINE_AMD,
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};
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+enum spectre_v2_user_cmd {
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+ SPECTRE_V2_USER_CMD_NONE,
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+ SPECTRE_V2_USER_CMD_AUTO,
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+ SPECTRE_V2_USER_CMD_FORCE,
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+};
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+
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+static const char * const spectre_v2_user_strings[] = {
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+ [SPECTRE_V2_USER_NONE] = "User space: Vulnerable",
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+ [SPECTRE_V2_USER_STRICT] = "User space: Mitigation: STIBP protection",
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+};
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+
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+static const struct {
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+ const char *option;
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+ enum spectre_v2_user_cmd cmd;
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+ bool secure;
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+} v2_user_options[] __initdata = {
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+ { "auto", SPECTRE_V2_USER_CMD_AUTO, false },
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+ { "off", SPECTRE_V2_USER_CMD_NONE, false },
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+ { "on", SPECTRE_V2_USER_CMD_FORCE, true },
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+};
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+
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+static void __init spec_v2_user_print_cond(const char *reason, bool secure)
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+{
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+ if (boot_cpu_has_bug(X86_BUG_SPECTRE_V2) != secure)
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+ pr_info("spectre_v2_user=%s forced on command line.\n", reason);
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+}
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+
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+static enum spectre_v2_user_cmd __init
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+spectre_v2_parse_user_cmdline(enum spectre_v2_mitigation_cmd v2_cmd)
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+{
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+ char arg[20];
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+ int ret, i;
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+
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+ switch (v2_cmd) {
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+ case SPECTRE_V2_CMD_NONE:
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+ return SPECTRE_V2_USER_CMD_NONE;
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+ case SPECTRE_V2_CMD_FORCE:
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+ return SPECTRE_V2_USER_CMD_FORCE;
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+ default:
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+ break;
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+ }
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+
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+ ret = cmdline_find_option(boot_command_line, "spectre_v2_user",
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+ arg, sizeof(arg));
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+ if (ret < 0)
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+ return SPECTRE_V2_USER_CMD_AUTO;
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+
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+ for (i = 0; i < ARRAY_SIZE(v2_user_options); i++) {
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+ if (match_option(arg, ret, v2_user_options[i].option)) {
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+ spec_v2_user_print_cond(v2_user_options[i].option,
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+ v2_user_options[i].secure);
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+ return v2_user_options[i].cmd;
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+ }
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+ }
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+
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+ pr_err("Unknown user space protection option (%s). Switching to AUTO select\n", arg);
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+ return SPECTRE_V2_USER_CMD_AUTO;
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+}
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+
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+static void __init
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+spectre_v2_user_select_mitigation(enum spectre_v2_mitigation_cmd v2_cmd)
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+{
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+ enum spectre_v2_user_mitigation mode = SPECTRE_V2_USER_NONE;
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+ bool smt_possible = IS_ENABLED(CONFIG_SMP);
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+
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+ if (!boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_STIBP))
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+ return;
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+
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+ if (cpu_smt_control == CPU_SMT_FORCE_DISABLED ||
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+ cpu_smt_control == CPU_SMT_NOT_SUPPORTED)
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+ smt_possible = false;
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+
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+ switch (spectre_v2_parse_user_cmdline(v2_cmd)) {
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+ case SPECTRE_V2_USER_CMD_AUTO:
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+ case SPECTRE_V2_USER_CMD_NONE:
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+ goto set_mode;
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+ case SPECTRE_V2_USER_CMD_FORCE:
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+ mode = SPECTRE_V2_USER_STRICT;
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+ break;
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+ }
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+
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+ /* Initialize Indirect Branch Prediction Barrier */
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+ if (boot_cpu_has(X86_FEATURE_IBPB)) {
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+ setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
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+ pr_info("Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier\n");
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+ }
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+
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+ /* If enhanced IBRS is enabled no STIPB required */
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+ if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
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+ return;
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+
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+set_mode:
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+ spectre_v2_user = mode;
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+ /* Only print the STIBP mode when SMT possible */
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+ if (smt_possible)
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+ pr_info("%s\n", spectre_v2_user_strings[mode]);
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+}
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+
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static const char * const spectre_v2_strings[] = {
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[SPECTRE_V2_NONE] = "Vulnerable",
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[SPECTRE_V2_RETPOLINE_GENERIC] = "Mitigation: Full generic retpoline",
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@@ -385,12 +489,6 @@ specv2_set_mode:
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setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
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pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
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- /* Initialize Indirect Branch Prediction Barrier if supported */
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- if (boot_cpu_has(X86_FEATURE_IBPB)) {
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- setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
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- pr_info("Spectre v2 mitigation: Enabling Indirect Branch Prediction Barrier\n");
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- }
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-
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/*
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* Retpoline means the kernel is safe because it has no indirect
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* branches. Enhanced IBRS protects firmware too, so, enable restricted
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@@ -407,23 +505,21 @@ specv2_set_mode:
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pr_info("Enabling Restricted Speculation for firmware calls\n");
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}
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+ /* Set up IBPB and STIBP depending on the general spectre V2 command */
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+ spectre_v2_user_select_mitigation(cmd);
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+
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/* Enable STIBP if appropriate */
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arch_smt_update();
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}
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static bool stibp_needed(void)
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{
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- if (spectre_v2_enabled == SPECTRE_V2_NONE)
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- return false;
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-
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/* Enhanced IBRS makes using STIBP unnecessary. */
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if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
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return false;
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- if (!boot_cpu_has(X86_FEATURE_STIBP))
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- return false;
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-
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- return true;
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+ /* Check for strict user mitigation mode */
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+ return spectre_v2_user == SPECTRE_V2_USER_STRICT;
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}
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static void update_stibp_msr(void *info)
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@@ -844,10 +940,13 @@ static char *stibp_state(void)
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if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
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return "";
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- if (x86_spec_ctrl_base & SPEC_CTRL_STIBP)
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- return ", STIBP";
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- else
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- return "";
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+ switch (spectre_v2_user) {
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+ case SPECTRE_V2_USER_NONE:
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+ return ", STIBP: disabled";
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+ case SPECTRE_V2_USER_STRICT:
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+ return ", STIBP: forced";
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+ }
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+ return "";
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}
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static char *ibpb_state(void)
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