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drm/amdgpu/dce: simplify suspend/resume

We were basically opencoding the same thing in both
hw_init and resume and hw_fini and suspend.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher 9 年之前
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共有 3 個文件被更改,包括 14 次插入33 次删除
  1. 4 11
      drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
  2. 5 12
      drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
  3. 5 10
      drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

+ 4 - 11
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

@@ -3086,22 +3086,18 @@ static int dce_v10_0_suspend(void *handle)
 
 
 	amdgpu_atombios_scratch_regs_save(adev);
 	amdgpu_atombios_scratch_regs_save(adev);
 
 
-	dce_v10_0_hpd_fini(adev);
-
-	return 0;
+	return dce_v10_0_hw_fini(handle);
 }
 }
 
 
 static int dce_v10_0_resume(void *handle)
 static int dce_v10_0_resume(void *handle)
 {
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+	int ret;
 
 
-	dce_v10_0_init_golden_registers(adev);
+	ret = dce_v10_0_hw_init(handle);
 
 
 	amdgpu_atombios_scratch_regs_restore(adev);
 	amdgpu_atombios_scratch_regs_restore(adev);
 
 
-	/* init dig PHYs, disp eng pll */
-	amdgpu_atombios_encoder_init_dig(adev);
-	amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);
 	/* turn on the BL */
 	/* turn on the BL */
 	if (adev->mode_info.bl_encoder) {
 	if (adev->mode_info.bl_encoder) {
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
@@ -3110,10 +3106,7 @@ static int dce_v10_0_resume(void *handle)
 						    bl_level);
 						    bl_level);
 	}
 	}
 
 
-	/* initialize hpd */
-	dce_v10_0_hpd_init(adev);
-
-	return 0;
+	return ret;
 }
 }
 
 
 static bool dce_v10_0_is_idle(void *handle)
 static bool dce_v10_0_is_idle(void *handle)

+ 5 - 12
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

@@ -3028,6 +3028,7 @@ static int dce_v11_0_hw_init(void *handle)
 	dce_v11_0_init_golden_registers(adev);
 	dce_v11_0_init_golden_registers(adev);
 
 
 	/* init dig PHYs, disp eng pll */
 	/* init dig PHYs, disp eng pll */
+	amdgpu_atombios_crtc_powergate_init(adev);
 	amdgpu_atombios_encoder_init_dig(adev);
 	amdgpu_atombios_encoder_init_dig(adev);
 	amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);
 	amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);
 
 
@@ -3061,23 +3062,18 @@ static int dce_v11_0_suspend(void *handle)
 
 
 	amdgpu_atombios_scratch_regs_save(adev);
 	amdgpu_atombios_scratch_regs_save(adev);
 
 
-	dce_v11_0_hpd_fini(adev);
-
-	return 0;
+	return dce_v11_0_hw_fini(handle);
 }
 }
 
 
 static int dce_v11_0_resume(void *handle)
 static int dce_v11_0_resume(void *handle)
 {
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+	int ret;
 
 
-	dce_v11_0_init_golden_registers(adev);
+	ret = dce_v11_0_hw_init(handle);
 
 
 	amdgpu_atombios_scratch_regs_restore(adev);
 	amdgpu_atombios_scratch_regs_restore(adev);
 
 
-	/* init dig PHYs, disp eng pll */
-	amdgpu_atombios_crtc_powergate_init(adev);
-	amdgpu_atombios_encoder_init_dig(adev);
-	amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);
 	/* turn on the BL */
 	/* turn on the BL */
 	if (adev->mode_info.bl_encoder) {
 	if (adev->mode_info.bl_encoder) {
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
@@ -3086,10 +3082,7 @@ static int dce_v11_0_resume(void *handle)
 						    bl_level);
 						    bl_level);
 	}
 	}
 
 
-	/* initialize hpd */
-	dce_v11_0_hpd_init(adev);
-
-	return 0;
+	return ret;
 }
 }
 
 
 static bool dce_v11_0_is_idle(void *handle)
 static bool dce_v11_0_is_idle(void *handle)

+ 5 - 10
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

@@ -2994,20 +2994,18 @@ static int dce_v8_0_suspend(void *handle)
 
 
 	amdgpu_atombios_scratch_regs_save(adev);
 	amdgpu_atombios_scratch_regs_save(adev);
 
 
-	dce_v8_0_hpd_fini(adev);
-
-	return 0;
+	return dce_v8_0_hw_fini(handle);
 }
 }
 
 
 static int dce_v8_0_resume(void *handle)
 static int dce_v8_0_resume(void *handle)
 {
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+	int ret;
+
+	ret = dce_v8_0_hw_init(handle);
 
 
 	amdgpu_atombios_scratch_regs_restore(adev);
 	amdgpu_atombios_scratch_regs_restore(adev);
 
 
-	/* init dig PHYs, disp eng pll */
-	amdgpu_atombios_encoder_init_dig(adev);
-	amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk);
 	/* turn on the BL */
 	/* turn on the BL */
 	if (adev->mode_info.bl_encoder) {
 	if (adev->mode_info.bl_encoder) {
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
 		u8 bl_level = amdgpu_display_backlight_get_level(adev,
@@ -3016,10 +3014,7 @@ static int dce_v8_0_resume(void *handle)
 						    bl_level);
 						    bl_level);
 	}
 	}
 
 
-	/* initialize hpd */
-	dce_v8_0_hpd_init(adev);
-
-	return 0;
+	return ret;
 }
 }
 
 
 static bool dce_v8_0_is_idle(void *handle)
 static bool dce_v8_0_is_idle(void *handle)