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@@ -1563,18 +1563,6 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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iwl_pcie_enable_rx_wake(trans, true);
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iwl_pcie_enable_rx_wake(trans, true);
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- /*
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- * Reconfigure IVAR table in case of MSIX or reset ict table in
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- * MSI mode since HW reset erased it.
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- * Also enables interrupts - none will happen as
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- * the device doesn't know we're waking it up, only when
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- * the opmode actually tells it after this call.
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- */
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- iwl_pcie_conf_msix_hw(trans_pcie);
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- if (!trans_pcie->msix_enabled)
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- iwl_pcie_reset_ict(trans);
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- iwl_enable_interrupts(trans);
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-
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iwl_set_bit(trans, CSR_GP_CNTRL,
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iwl_set_bit(trans, CSR_GP_CNTRL,
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BIT(trans->cfg->csr->flag_mac_access_req));
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BIT(trans->cfg->csr->flag_mac_access_req));
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iwl_set_bit(trans, CSR_GP_CNTRL,
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iwl_set_bit(trans, CSR_GP_CNTRL,
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@@ -1592,6 +1580,18 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
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return ret;
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return ret;
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}
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}
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+ /*
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+ * Reconfigure IVAR table in case of MSIX or reset ict table in
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+ * MSI mode since HW reset erased it.
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+ * Also enables interrupts - none will happen as
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+ * the device doesn't know we're waking it up, only when
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+ * the opmode actually tells it after this call.
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+ */
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+ iwl_pcie_conf_msix_hw(trans_pcie);
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+ if (!trans_pcie->msix_enabled)
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+ iwl_pcie_reset_ict(trans);
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+ iwl_enable_interrupts(trans);
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+
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iwl_pcie_set_pwr(trans, false);
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iwl_pcie_set_pwr(trans, false);
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if (!reset) {
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if (!reset) {
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