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@@ -309,7 +309,7 @@ static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx,
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(post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);
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}
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-static void __maybe_unused mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable)
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+static void mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable)
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{
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unsigned val = 0;
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@@ -322,7 +322,7 @@ static void __maybe_unused mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int
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writel(val, spi_imx->base + MX51_ECSPI_INT);
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}
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-static void __maybe_unused mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
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+static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
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{
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u32 reg;
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@@ -331,8 +331,8 @@ static void __maybe_unused mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
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writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
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}
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-static int __maybe_unused mx51_ecspi_config(struct spi_device *spi,
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- struct spi_imx_config *config)
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+static int mx51_ecspi_config(struct spi_device *spi,
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+ struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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u32 ctrl = MX51_ECSPI_CTRL_ENABLE;
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@@ -422,12 +422,12 @@ static int __maybe_unused mx51_ecspi_config(struct spi_device *spi,
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return 0;
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}
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-static int __maybe_unused mx51_ecspi_rx_available(struct spi_imx_data *spi_imx)
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+static int mx51_ecspi_rx_available(struct spi_imx_data *spi_imx)
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{
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return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR;
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}
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-static void __maybe_unused mx51_ecspi_reset(struct spi_imx_data *spi_imx)
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+static void mx51_ecspi_reset(struct spi_imx_data *spi_imx)
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{
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/* drain receive buffer */
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while (mx51_ecspi_rx_available(spi_imx))
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@@ -457,7 +457,7 @@ static void __maybe_unused mx51_ecspi_reset(struct spi_imx_data *spi_imx)
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* the i.MX35 has a slightly different register layout for bits
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* we do not use here.
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*/
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-static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable)
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+static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable)
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{
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unsigned int val = 0;
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@@ -469,7 +469,7 @@ static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable
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writel(val, spi_imx->base + MXC_CSPIINT);
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}
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-static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx)
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+static void mx31_trigger(struct spi_imx_data *spi_imx)
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{
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unsigned int reg;
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@@ -478,8 +478,7 @@ static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx)
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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}
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-static int __maybe_unused mx31_config(struct spi_device *spi,
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- struct spi_imx_config *config)
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+static int mx31_config(struct spi_device *spi, struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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@@ -510,12 +509,12 @@ static int __maybe_unused mx31_config(struct spi_device *spi,
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return 0;
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}
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-static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx)
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+static int mx31_rx_available(struct spi_imx_data *spi_imx)
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{
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return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR;
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}
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-static void __maybe_unused mx31_reset(struct spi_imx_data *spi_imx)
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+static void mx31_reset(struct spi_imx_data *spi_imx)
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{
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/* drain receive buffer */
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while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR)
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@@ -535,7 +534,7 @@ static void __maybe_unused mx31_reset(struct spi_imx_data *spi_imx)
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#define MX21_CSPICTRL_DR_SHIFT 14
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#define MX21_CSPICTRL_CS_SHIFT 19
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-static void __maybe_unused mx21_intctrl(struct spi_imx_data *spi_imx, int enable)
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+static void mx21_intctrl(struct spi_imx_data *spi_imx, int enable)
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{
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unsigned int val = 0;
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@@ -547,7 +546,7 @@ static void __maybe_unused mx21_intctrl(struct spi_imx_data *spi_imx, int enable
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writel(val, spi_imx->base + MXC_CSPIINT);
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}
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-static void __maybe_unused mx21_trigger(struct spi_imx_data *spi_imx)
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+static void mx21_trigger(struct spi_imx_data *spi_imx)
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{
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unsigned int reg;
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@@ -556,8 +555,7 @@ static void __maybe_unused mx21_trigger(struct spi_imx_data *spi_imx)
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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}
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-static int __maybe_unused mx21_config(struct spi_device *spi,
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- struct spi_imx_config *config)
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+static int mx21_config(struct spi_device *spi, struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER;
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@@ -581,12 +579,12 @@ static int __maybe_unused mx21_config(struct spi_device *spi,
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return 0;
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}
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-static int __maybe_unused mx21_rx_available(struct spi_imx_data *spi_imx)
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+static int mx21_rx_available(struct spi_imx_data *spi_imx)
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{
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return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR;
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}
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-static void __maybe_unused mx21_reset(struct spi_imx_data *spi_imx)
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+static void mx21_reset(struct spi_imx_data *spi_imx)
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{
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writel(1, spi_imx->base + MXC_RESET);
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}
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@@ -602,7 +600,7 @@ static void __maybe_unused mx21_reset(struct spi_imx_data *spi_imx)
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#define MX1_CSPICTRL_MASTER (1 << 10)
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#define MX1_CSPICTRL_DR_SHIFT 13
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-static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
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+static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
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{
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unsigned int val = 0;
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@@ -614,7 +612,7 @@ static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
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writel(val, spi_imx->base + MXC_CSPIINT);
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}
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-static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx)
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+static void mx1_trigger(struct spi_imx_data *spi_imx)
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{
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unsigned int reg;
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@@ -623,8 +621,7 @@ static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx)
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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}
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-static int __maybe_unused mx1_config(struct spi_device *spi,
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- struct spi_imx_config *config)
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+static int mx1_config(struct spi_device *spi, struct spi_imx_config *config)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
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@@ -643,12 +640,12 @@ static int __maybe_unused mx1_config(struct spi_device *spi,
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return 0;
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}
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-static int __maybe_unused mx1_rx_available(struct spi_imx_data *spi_imx)
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+static int mx1_rx_available(struct spi_imx_data *spi_imx)
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{
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return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR;
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}
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-static void __maybe_unused mx1_reset(struct spi_imx_data *spi_imx)
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+static void mx1_reset(struct spi_imx_data *spi_imx)
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{
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writel(1, spi_imx->base + MXC_RESET);
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}
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