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@@ -1638,7 +1638,17 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
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break;
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break;
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case 2:
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case 2:
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args.v2.ucCRTC = radeon_crtc->crtc_id;
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args.v2.ucCRTC = radeon_crtc->crtc_id;
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- args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
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+ if (radeon_encoder_is_dp_bridge(encoder)) {
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+ struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
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+
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+ if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)
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+ args.v2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS;
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+ else if (connector->connector_type == DRM_MODE_CONNECTOR_VGA)
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+ args.v2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
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+ else
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+ args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
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+ } else
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+ args.v2.ucEncodeMode = atombios_get_encoder_mode(encoder);
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switch (radeon_encoder->encoder_id) {
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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@@ -1756,10 +1766,15 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
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if (ASIC_IS_DCE4(rdev)) {
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if (ASIC_IS_DCE4(rdev)) {
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dig = radeon_encoder->enc_priv;
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dig = radeon_encoder->enc_priv;
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if (ASIC_IS_DCE41(rdev)) {
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if (ASIC_IS_DCE41(rdev)) {
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- if (dig->linkb)
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- return 1;
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- else
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- return 0;
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+ /* ontario follows DCE4 */
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+ if (rdev->family == CHIP_PALM) {
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+ if (dig->linkb)
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+ return 1;
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+ else
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+ return 0;
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+ } else
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+ /* llano follows DCE3.2 */
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+ return radeon_crtc->crtc_id;
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} else {
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} else {
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switch (radeon_encoder->encoder_id) {
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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