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@@ -40,7 +40,7 @@
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#define LTSSM_EN_VAL BIT(0)
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#define LTSSM_STATE_MASK 0x1f
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#define LTSSM_STATE_L0 0x11
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-#define DBI_CS2_EN_VAL 0x20
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+#define DBI_CS2 BIT(5)
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#define OB_XLAT_EN_VAL BIT(1)
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/* Application registers */
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@@ -315,11 +315,12 @@ static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)
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u32 val;
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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- ks_pcie_app_writel(ks_pcie, CMD_STATUS, DBI_CS2_EN_VAL | val);
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+ val |= DBI_CS2;
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+ ks_pcie_app_writel(ks_pcie, CMD_STATUS, val);
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do {
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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- } while (!(val & DBI_CS2_EN_VAL));
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+ } while (!(val & DBI_CS2));
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}
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/**
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@@ -333,11 +334,12 @@ static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie)
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u32 val;
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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- ks_pcie_app_writel(ks_pcie, CMD_STATUS, ~DBI_CS2_EN_VAL & val);
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+ val &= ~DBI_CS2;
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+ ks_pcie_app_writel(ks_pcie, CMD_STATUS, val);
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do {
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val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
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- } while (val & DBI_CS2_EN_VAL);
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+ } while (val & DBI_CS2);
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}
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static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie)
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