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@@ -621,6 +621,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
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{
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struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
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struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
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+ struct drm_mm_node *mm_node = mem->mm_node;
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mem->bus.addr = NULL;
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mem->bus.offset = 0;
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@@ -640,6 +641,15 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
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/* check if it's visible */
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if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size)
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return -EINVAL;
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+ /* Only physically contiguous buffers apply. In a contiguous
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+ * buffer, size of the first mm_node would match the number of
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+ * pages in ttm_mem_reg.
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+ */
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+ if (adev->mman.aper_base_kaddr &&
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+ (mm_node->size == mem->num_pages))
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+ mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
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+ mem->bus.offset;
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+
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mem->bus.base = adev->gmc.aper_base;
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mem->bus.is_iomem = true;
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break;
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@@ -1402,6 +1412,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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/* Change the size here instead of the init above so only lpfn is affected */
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amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
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+#ifdef CONFIG_64BIT
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+ adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
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+ adev->gmc.visible_vram_size);
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+#endif
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/*
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*The reserved vram for firmware must be pinned to the specified
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@@ -1494,6 +1508,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
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amdgpu_ttm_debugfs_fini(adev);
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amdgpu_bo_free_kernel(&adev->stolen_vga_memory, NULL, NULL);
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amdgpu_ttm_fw_reserve_vram_fini(adev);
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+ if (adev->mman.aper_base_kaddr)
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+ iounmap(adev->mman.aper_base_kaddr);
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+ adev->mman.aper_base_kaddr = NULL;
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ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM);
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ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT);
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