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@@ -654,9 +654,36 @@ static void byt_read_dsm(struct sdhci_pci_slot *slot)
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slot->chip->rpm_retune = intel_host->d3_retune;
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}
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-static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
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+static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode)
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+{
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+ int err = sdhci_execute_tuning(mmc, opcode);
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+ struct sdhci_host *host = mmc_priv(mmc);
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+
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+ if (err)
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+ return err;
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+
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+ /*
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+ * Tuning can leave the IP in an active state (Buffer Read Enable bit
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+ * set) which prevents the entry to low power states (i.e. S0i3). Data
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+ * reset will clear it.
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+ */
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+ sdhci_reset(host, SDHCI_RESET_DATA);
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+
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+ return 0;
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+}
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+
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+static void byt_probe_slot(struct sdhci_pci_slot *slot)
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{
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+ struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
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+
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byt_read_dsm(slot);
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+
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+ ops->execute_tuning = intel_execute_tuning;
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+}
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+
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+static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
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+{
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+ byt_probe_slot(slot);
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slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
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MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
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MMC_CAP_CMD_DURING_TFR |
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@@ -779,7 +806,7 @@ static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
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{
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int err;
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- byt_read_dsm(slot);
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+ byt_probe_slot(slot);
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err = ni_set_max_freq(slot);
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if (err)
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@@ -792,7 +819,7 @@ static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
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static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
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{
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- byt_read_dsm(slot);
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+ byt_probe_slot(slot);
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slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
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MMC_CAP_WAIT_WHILE_BUSY;
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return 0;
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@@ -800,7 +827,7 @@ static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
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static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
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{
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- byt_read_dsm(slot);
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+ byt_probe_slot(slot);
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slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
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MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE;
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slot->cd_idx = 0;
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