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@@ -648,58 +648,40 @@ out:
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return ret;
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}
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-void
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-intel_fini_pipe_control(struct intel_engine_cs *engine)
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+void intel_fini_pipe_control(struct intel_engine_cs *engine)
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{
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if (engine->scratch.obj == NULL)
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return;
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- if (INTEL_GEN(engine->i915) >= 5) {
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- kunmap(sg_page(engine->scratch.obj->pages->sgl));
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- i915_gem_object_ggtt_unpin(engine->scratch.obj);
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- }
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-
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+ i915_gem_object_ggtt_unpin(engine->scratch.obj);
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drm_gem_object_unreference(&engine->scratch.obj->base);
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engine->scratch.obj = NULL;
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}
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-int
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-intel_init_pipe_control(struct intel_engine_cs *engine)
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+int intel_init_pipe_control(struct intel_engine_cs *engine)
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{
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+ struct drm_i915_gem_object *obj;
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int ret;
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WARN_ON(engine->scratch.obj);
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- engine->scratch.obj = i915_gem_object_create(engine->i915->dev, 4096);
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- if (IS_ERR(engine->scratch.obj)) {
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- DRM_ERROR("Failed to allocate seqno page\n");
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- ret = PTR_ERR(engine->scratch.obj);
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- engine->scratch.obj = NULL;
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+ obj = i915_gem_object_create(engine->i915->dev, 4096);
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+ if (IS_ERR(obj)) {
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+ DRM_ERROR("Failed to allocate scratch page\n");
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+ ret = PTR_ERR(obj);
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goto err;
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}
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- ret = i915_gem_object_set_cache_level(engine->scratch.obj,
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- I915_CACHE_LLC);
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+ ret = i915_gem_obj_ggtt_pin(obj, 4096, PIN_HIGH);
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if (ret)
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goto err_unref;
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- ret = i915_gem_obj_ggtt_pin(engine->scratch.obj, 4096, 0);
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- if (ret)
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- goto err_unref;
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-
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- engine->scratch.gtt_offset = i915_gem_obj_ggtt_offset(engine->scratch.obj);
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- engine->scratch.cpu_page = kmap(sg_page(engine->scratch.obj->pages->sgl));
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- if (engine->scratch.cpu_page == NULL) {
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- ret = -ENOMEM;
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- goto err_unpin;
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- }
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-
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+ engine->scratch.obj = obj;
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+ engine->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj);
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DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08x\n",
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engine->name, engine->scratch.gtt_offset);
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return 0;
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-err_unpin:
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- i915_gem_object_ggtt_unpin(engine->scratch.obj);
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err_unref:
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drm_gem_object_unreference(&engine->scratch.obj->base);
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err:
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