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usb: gadget: s3c-hsotg: get phy bus width from phy subsystem

Adds support for querying the phy bus width from the generic phy
subsystem. Configure UTMI bus width in GUSBCFG based on this value.

Signed-off-by: Matt Porter <mporter@linaro.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Matt Porter 11 éve
szülő
commit
f7e504c72d
2 módosított fájl, 14 hozzáadás és 1 törlés
  1. 13 1
      drivers/usb/gadget/s3c-hsotg.c
  2. 1 0
      drivers/usb/gadget/s3c-hsotg.h

+ 13 - 1
drivers/usb/gadget/s3c-hsotg.c

@@ -146,6 +146,7 @@ struct s3c_hsotg_ep {
  * @regs: The memory area mapped for accessing registers.
  * @regs: The memory area mapped for accessing registers.
  * @irq: The IRQ number we are using
  * @irq: The IRQ number we are using
  * @supplies: Definition of USB power supplies
  * @supplies: Definition of USB power supplies
+ * @phyif: PHY interface width
  * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
  * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos.
  * @num_of_eps: Number of available EPs (excluding EP0)
  * @num_of_eps: Number of available EPs (excluding EP0)
  * @debug_root: root directrory for debugfs.
  * @debug_root: root directrory for debugfs.
@@ -174,6 +175,7 @@ struct s3c_hsotg {
 
 
 	struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];
 	struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)];
 
 
+	u32			phyif;
 	unsigned int		dedicated_fifos:1;
 	unsigned int		dedicated_fifos:1;
 	unsigned char           num_of_eps;
 	unsigned char           num_of_eps;
 
 
@@ -2288,7 +2290,7 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg)
 	 */
 	 */
 
 
 	/* set the PLL on, remove the HNP/SRP and set the PHY */
 	/* set the PLL on, remove the HNP/SRP and set the PHY */
-	writel(GUSBCFG_PHYIf16 | GUSBCFG_TOutCal(7) |
+	writel(hsotg->phyif | GUSBCFG_TOutCal(7) |
 	       (0x5 << 10), hsotg->regs + GUSBCFG);
 	       (0x5 << 10), hsotg->regs + GUSBCFG);
 
 
 	s3c_hsotg_init_fifo(hsotg);
 	s3c_hsotg_init_fifo(hsotg);
@@ -3646,6 +3648,16 @@ static int s3c_hsotg_probe(struct platform_device *pdev)
 		goto err_supplies;
 		goto err_supplies;
 	}
 	}
 
 
+	/* Set default UTMI width */
+	hsotg->phyif = GUSBCFG_PHYIf16;
+
+	/*
+	 * If using the generic PHY framework, check if the PHY bus
+	 * width is 8-bit and set the phyif appropriately.
+	 */
+	if (hsotg->phy && (phy_get_bus_width(phy) == 8))
+		hsotg->phyif = GUSBCFG_PHYIf8;
+
 	if (hsotg->phy)
 	if (hsotg->phy)
 		phy_init(hsotg->phy);
 		phy_init(hsotg->phy);
 
 

+ 1 - 0
drivers/usb/gadget/s3c-hsotg.h

@@ -55,6 +55,7 @@
 #define GUSBCFG_HNPCap				(1 << 9)
 #define GUSBCFG_HNPCap				(1 << 9)
 #define GUSBCFG_SRPCap				(1 << 8)
 #define GUSBCFG_SRPCap				(1 << 8)
 #define GUSBCFG_PHYIf16			(1 << 3)
 #define GUSBCFG_PHYIf16			(1 << 3)
+#define GUSBCFG_PHYIf8				(0 << 3)
 #define GUSBCFG_TOutCal_MASK			(0x7 << 0)
 #define GUSBCFG_TOutCal_MASK			(0x7 << 0)
 #define GUSBCFG_TOutCal_SHIFT			(0)
 #define GUSBCFG_TOutCal_SHIFT			(0)
 #define GUSBCFG_TOutCal_LIMIT			(0x7)
 #define GUSBCFG_TOutCal_LIMIT			(0x7)