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@@ -99,6 +99,14 @@
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"ahb1_sat";
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};
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+ ss_clk: clk@01c2009c {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod0-clk";
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+ reg = <0x01c2009c 0x4>;
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+ clocks = <&osc24M>, <&pll6 0>;
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+ clock-output-names = "ss";
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+ };
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+
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mbus_clk: clk@01c2015c {
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#clock-cells = <0>;
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compatible = "allwinner,sun8i-a23-mbus-clk";
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@@ -109,6 +117,16 @@
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};
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soc@01c00000 {
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+ crypto: crypto-engine@01c15000 {
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+ compatible = "allwinner,sun4i-a10-crypto";
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+ reg = <0x01c15000 0x1000>;
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+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ahb1_gates 5>, <&ss_clk>;
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+ clock-names = "ahb", "mod";
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+ resets = <&ahb1_rst 5>;
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+ reset-names = "ahb";
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+ };
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+
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usb_otg: usb@01c19000 {
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compatible = "allwinner,sun8i-a33-musb";
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reg = <0x01c19000 0x0400>;
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