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@@ -88,6 +88,8 @@ void __init arm_dt_init_cpu_maps(void)
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return;
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for_each_child_of_node(cpus, cpu) {
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+ const __be32 *cell;
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+ int prop_bytes;
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u32 hwid;
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if (of_node_cmp(cpu->type, "cpu"))
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@@ -99,7 +101,8 @@ void __init arm_dt_init_cpu_maps(void)
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* properties is considered invalid to build the
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* cpu_logical_map.
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*/
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- if (of_property_read_u32(cpu, "reg", &hwid)) {
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+ cell = of_get_property(cpu, "reg", &prop_bytes);
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+ if (!cell || prop_bytes < sizeof(*cell)) {
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pr_debug(" * %s missing reg property\n",
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cpu->full_name);
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of_node_put(cpu);
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@@ -107,10 +110,15 @@ void __init arm_dt_init_cpu_maps(void)
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}
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/*
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- * 8 MSBs must be set to 0 in the DT since the reg property
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+ * Bits n:24 must be set to 0 in the DT since the reg property
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* defines the MPIDR[23:0].
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*/
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- if (hwid & ~MPIDR_HWID_BITMASK) {
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+ do {
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+ hwid = be32_to_cpu(*cell++);
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+ prop_bytes -= sizeof(*cell);
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+ } while (!hwid && prop_bytes > 0);
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+
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+ if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
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of_node_put(cpu);
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return;
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}
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