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@@ -30,7 +30,7 @@
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enum sdio_interrupt_type {
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BUFFER_FULL = 0x0,
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- BUFFER_AVAILABLE = 0x1,
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+ BUFFER_AVAILABLE = 0x2,
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FIRMWARE_ASSERT_IND = 0x3,
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MSDU_PACKET_PENDING = 0x4,
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UNKNOWN_INT = 0XE
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@@ -42,7 +42,7 @@ enum sdio_interrupt_type {
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#define PKT_MGMT_BUFF_FULL 2
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#define MSDU_PKT_PENDING 3
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/* Interrupt Bit Related Macros */
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-#define PKT_BUFF_AVAILABLE 0
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+#define PKT_BUFF_AVAILABLE 1
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#define FW_ASSERT_IND 2
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#define RSI_DEVICE_BUFFER_STATUS_REGISTER 0xf3
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@@ -84,7 +84,7 @@ enum sdio_interrupt_type {
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#define TA_HOLD_THREAD_VALUE cpu_to_le32(0xF)
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#define TA_RELEASE_THREAD_VALUE cpu_to_le32(0xF)
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#define TA_BASE_ADDR 0x2200
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-#define MISC_CFG_BASE_ADDR 0x4150
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+#define MISC_CFG_BASE_ADDR 0x4105
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struct receive_info {
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bool buffer_full;
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@@ -98,7 +98,7 @@ struct receive_info {
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u32 total_sdio_msdu_pending_intr;
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u32 total_sdio_unknown_intr;
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u32 buf_full_counter;
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- u32 buf_avilable_counter;
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+ u32 buf_available_counter;
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};
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struct rsi_91x_sdiodev {
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