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@@ -84,11 +84,10 @@ void __init r8a7791_pinmux_init(void)
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r8a7791_register_gpio(7);
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r8a7791_register_gpio(7);
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}
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}
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-#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \
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+#define __R8A7791_SCIF(scif_type, index, baseaddr, irq) \
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static struct plat_sci_port scif##index##_platform_data = { \
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static struct plat_sci_port scif##index##_platform_data = { \
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.type = scif_type, \
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.type = scif_type, \
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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- .scbrr_algo_id = algo, \
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.scscr = SCSCR_RE | SCSCR_TE, \
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.scscr = SCSCR_RE | SCSCR_TE, \
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}; \
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}; \
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\
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\
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@@ -98,13 +97,13 @@ static struct resource scif##index##_resources[] = { \
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}
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}
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#define R8A7791_SCIF(index, baseaddr, irq) \
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#define R8A7791_SCIF(index, baseaddr, irq) \
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- __R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq)
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+ __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
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#define R8A7791_SCIFA(index, baseaddr, irq) \
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#define R8A7791_SCIFA(index, baseaddr, irq) \
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- __R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq)
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+ __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
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#define R8A7791_SCIFB(index, baseaddr, irq) \
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#define R8A7791_SCIFB(index, baseaddr, irq) \
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- __R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq)
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+ __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
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R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
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R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
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R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
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R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
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