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@@ -222,8 +222,9 @@
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sdmmc: dwmmc@ff0c0000 {
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sdmmc: dwmmc@ff0c0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3288-dw-mshc";
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clock-freq-min-max = <400000 150000000>;
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clock-freq-min-max = <400000 150000000>;
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- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
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- clock-names = "biu", "ciu";
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+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xff0c0000 0x4000>;
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reg = <0xff0c0000 0x4000>;
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@@ -233,8 +234,9 @@
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sdio0: dwmmc@ff0d0000 {
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sdio0: dwmmc@ff0d0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3288-dw-mshc";
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clock-freq-min-max = <400000 150000000>;
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clock-freq-min-max = <400000 150000000>;
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- clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>;
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- clock-names = "biu", "ciu";
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+ clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
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+ <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xff0d0000 0x4000>;
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reg = <0xff0d0000 0x4000>;
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@@ -244,8 +246,9 @@
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sdio1: dwmmc@ff0e0000 {
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sdio1: dwmmc@ff0e0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3288-dw-mshc";
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clock-freq-min-max = <400000 150000000>;
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clock-freq-min-max = <400000 150000000>;
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- clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>;
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- clock-names = "biu", "ciu";
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+ clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
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+ <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xff0e0000 0x4000>;
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reg = <0xff0e0000 0x4000>;
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@@ -255,8 +258,9 @@
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emmc: dwmmc@ff0f0000 {
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emmc: dwmmc@ff0f0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3288-dw-mshc";
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clock-freq-min-max = <400000 150000000>;
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clock-freq-min-max = <400000 150000000>;
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- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
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- clock-names = "biu", "ciu";
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+ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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+ <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xff0f0000 0x4000>;
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reg = <0xff0f0000 0x4000>;
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