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@@ -9578,6 +9578,15 @@ static int bnx2x_init_shmem(struct bnx2x *bp)
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do {
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bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR);
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+
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+ /* If we read all 0xFFs, means we are in PCI error state and
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+ * should bail out to avoid crashes on adapter's FW reads.
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+ */
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+ if (bp->common.shmem_base == 0xFFFFFFFF) {
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+ bp->flags |= NO_MCP_FLAG;
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+ return -ENODEV;
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+ }
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+
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if (bp->common.shmem_base) {
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val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]);
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if (val & SHR_MEM_VALIDITY_MB)
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@@ -14320,7 +14329,10 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev)
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BNX2X_ERR("IO slot reset --> driver unload\n");
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/* MCP should have been reset; Need to wait for validity */
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- bnx2x_init_shmem(bp);
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+ if (bnx2x_init_shmem(bp)) {
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+ rtnl_unlock();
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+ return PCI_ERS_RESULT_DISCONNECT;
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+ }
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if (IS_PF(bp) && SHMEM2_HAS(bp, drv_capabilities_flag)) {
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u32 v;
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