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@@ -5864,7 +5864,6 @@ void intel_init_clock_gating(struct drm_device *dev)
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_3D_CHICKEN2_WM_READ_PIPELINED << 16 |
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_3D_CHICKEN2_WM_READ_PIPELINED << 16 |
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_3D_CHICKEN2_WM_READ_PIPELINED);
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_3D_CHICKEN2_WM_READ_PIPELINED);
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}
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}
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- return;
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} else if (IS_G4X(dev)) {
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} else if (IS_G4X(dev)) {
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uint32_t dspclk_gate;
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uint32_t dspclk_gate;
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I915_WRITE(RENCLK_GATE_D1, 0);
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I915_WRITE(RENCLK_GATE_D1, 0);
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