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@@ -12,14 +12,33 @@ its hardware characteristcs.
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* compatible: These have to be supplemented with "arm,primecell" as
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drivers are using the AMBA bus interface. Possible values include:
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- - "arm,coresight-etb10", "arm,primecell";
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- - "arm,coresight-tpiu", "arm,primecell";
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- - "arm,coresight-tmc", "arm,primecell";
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- - "arm,coresight-funnel", "arm,primecell";
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- - "arm,coresight-etm3x", "arm,primecell";
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- - "arm,coresight-etm4x", "arm,primecell";
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- - "qcom,coresight-replicator1x", "arm,primecell";
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- - "arm,coresight-stm", "arm,primecell"; [1]
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+ - Embedded Trace Buffer (version 1.0):
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+ "arm,coresight-etb10", "arm,primecell";
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+
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+ - Trace Port Interface Unit:
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+ "arm,coresight-tpiu", "arm,primecell";
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+
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+ - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
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+ Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR)
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+ configuration. The configuration mode (ETB, ETF, ETR) is
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+ discovered at boot time when the device is probed.
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+ "arm,coresight-tmc", "arm,primecell";
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+
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+ - Trace Funnel:
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+ "arm,coresight-funnel", "arm,primecell";
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+
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+ - Embedded Trace Macrocell (version 3.x) and
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+ Program Flow Trace Macrocell:
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+ "arm,coresight-etm3x", "arm,primecell";
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+
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+ - Embedded Trace Macrocell (version 4.x):
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+ "arm,coresight-etm4x", "arm,primecell";
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+
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+ - Qualcomm Configurable Replicator (version 1.x):
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+ "qcom,coresight-replicator1x", "arm,primecell";
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+
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+ - System Trace Macrocell:
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+ "arm,coresight-stm", "arm,primecell"; [1]
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* reg: physical base address and length of the register
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set(s) of the component.
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