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+NVIDIA Tegra186 MISC register block
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+
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+The MISC register block found on Tegra186 SoCs contains registers that can be
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+used to identify a given chip and various strapping options.
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+
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+Required properties:
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+- compatible: Must be:
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+ - Tegra186: "nvidia,tegra186-misc"
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+- reg: Should contain 2 entries: The first entry gives the physical address
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+ and length of the register region which contains revision and debug
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+ features. The second entry specifies the physical address and length
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+ of the register region indicating the strapping options.
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