Bladeren bron

dt-bindings: misc: Add Tegra186 MISC registers bindings

The MISC register block found on Tegra186 SoCs contains registers that
can be used to identify a given chip and various strapping options.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding 8 jaren geleden
bovenliggende
commit
f580fd3f9d
1 gewijzigde bestanden met toevoegingen van 12 en 0 verwijderingen
  1. 12 0
      Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt

+ 12 - 0
Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt

@@ -0,0 +1,12 @@
+NVIDIA Tegra186 MISC register block
+
+The MISC register block found on Tegra186 SoCs contains registers that can be
+used to identify a given chip and various strapping options.
+
+Required properties:
+- compatible: Must be:
+  - Tegra186: "nvidia,tegra186-misc"
+- reg: Should contain 2 entries: The first entry gives the physical address
+       and length of the register region which contains revision and debug
+       features. The second entry specifies the physical address and length
+       of the register region indicating the strapping options.