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@@ -111,7 +111,7 @@ static const struct clk_ops slow_osc_ops = {
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.is_prepared = clk_slow_osc_is_prepared,
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};
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-static struct clk * __init
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+static struct clk_hw * __init
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at91_clk_register_slow_osc(void __iomem *sckcr,
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const char *name,
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const char *parent_name,
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@@ -119,8 +119,9 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
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bool bypass)
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{
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struct clk_slow_osc *osc;
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- struct clk *clk = NULL;
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+ struct clk_hw *hw;
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struct clk_init_data init;
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+ int ret;
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if (!sckcr || !name || !parent_name)
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return ERR_PTR(-EINVAL);
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@@ -143,17 +144,20 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
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writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
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sckcr);
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- clk = clk_register(NULL, &osc->hw);
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- if (IS_ERR(clk))
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+ hw = &osc->hw;
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+ ret = clk_hw_register(NULL, &osc->hw);
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+ if (ret) {
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kfree(osc);
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+ hw = ERR_PTR(ret);
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+ }
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- return clk;
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+ return hw;
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}
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void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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- struct clk *clk;
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+ struct clk_hw *hw;
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const char *parent_name;
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const char *name = np->name;
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u32 startup;
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@@ -164,12 +168,12 @@ void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
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of_property_read_u32(np, "atmel,startup-time-usec", &startup);
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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- clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
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+ hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
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bypass);
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- if (IS_ERR(clk))
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+ if (IS_ERR(hw))
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return;
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- of_clk_add_provider(np, of_clk_src_simple_get, clk);
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+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
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}
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static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
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@@ -223,7 +227,7 @@ static const struct clk_ops slow_rc_osc_ops = {
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.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
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};
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-static struct clk * __init
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+static struct clk_hw * __init
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at91_clk_register_slow_rc_osc(void __iomem *sckcr,
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const char *name,
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unsigned long frequency,
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@@ -231,8 +235,9 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
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unsigned long startup)
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{
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struct clk_slow_rc_osc *osc;
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- struct clk *clk = NULL;
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+ struct clk_hw *hw;
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struct clk_init_data init;
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+ int ret;
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if (!sckcr || !name)
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return ERR_PTR(-EINVAL);
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@@ -253,17 +258,20 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
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osc->accuracy = accuracy;
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osc->startup_usec = startup;
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- clk = clk_register(NULL, &osc->hw);
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- if (IS_ERR(clk))
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+ hw = &osc->hw;
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+ ret = clk_hw_register(NULL, &osc->hw);
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+ if (ret) {
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kfree(osc);
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+ hw = ERR_PTR(ret);
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+ }
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- return clk;
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+ return hw;
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}
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void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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- struct clk *clk;
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+ struct clk_hw *hw;
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u32 frequency = 0;
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u32 accuracy = 0;
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u32 startup = 0;
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@@ -274,12 +282,12 @@ void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
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of_property_read_u32(np, "clock-accuracy", &accuracy);
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of_property_read_u32(np, "atmel,startup-time-usec", &startup);
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- clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
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+ hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
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startup);
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- if (IS_ERR(clk))
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+ if (IS_ERR(hw))
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return;
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- of_clk_add_provider(np, of_clk_src_simple_get, clk);
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+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
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}
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static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
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@@ -321,15 +329,16 @@ static const struct clk_ops sam9x5_slow_ops = {
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.get_parent = clk_sam9x5_slow_get_parent,
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};
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-static struct clk * __init
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+static struct clk_hw * __init
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at91_clk_register_sam9x5_slow(void __iomem *sckcr,
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const char *name,
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const char **parent_names,
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int num_parents)
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{
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struct clk_sam9x5_slow *slowck;
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- struct clk *clk = NULL;
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+ struct clk_hw *hw;
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struct clk_init_data init;
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+ int ret;
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if (!sckcr || !name || !parent_names || !num_parents)
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return ERR_PTR(-EINVAL);
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@@ -348,17 +357,20 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
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slowck->sckcr = sckcr;
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slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
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- clk = clk_register(NULL, &slowck->hw);
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- if (IS_ERR(clk))
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+ hw = &slowck->hw;
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+ ret = clk_hw_register(NULL, &slowck->hw);
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+ if (ret) {
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kfree(slowck);
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+ hw = ERR_PTR(ret);
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+ }
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- return clk;
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+ return hw;
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}
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void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
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void __iomem *sckcr)
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{
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- struct clk *clk;
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+ struct clk_hw *hw;
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const char *parent_names[2];
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unsigned int num_parents;
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const char *name = np->name;
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@@ -371,12 +383,12 @@ void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
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of_property_read_string(np, "clock-output-names", &name);
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- clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
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+ hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
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num_parents);
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- if (IS_ERR(clk))
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+ if (IS_ERR(hw))
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return;
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- of_clk_add_provider(np, of_clk_src_simple_get, clk);
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+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
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}
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static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
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@@ -393,15 +405,16 @@ static const struct clk_ops sam9260_slow_ops = {
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.get_parent = clk_sam9260_slow_get_parent,
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};
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-static struct clk * __init
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+static struct clk_hw * __init
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at91_clk_register_sam9260_slow(struct regmap *regmap,
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const char *name,
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const char **parent_names,
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int num_parents)
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{
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struct clk_sam9260_slow *slowck;
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- struct clk *clk = NULL;
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+ struct clk_hw *hw;
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struct clk_init_data init;
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+ int ret;
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if (!name)
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return ERR_PTR(-EINVAL);
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@@ -422,16 +435,19 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,
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slowck->hw.init = &init;
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slowck->regmap = regmap;
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- clk = clk_register(NULL, &slowck->hw);
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- if (IS_ERR(clk))
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+ hw = &slowck->hw;
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+ ret = clk_hw_register(NULL, &slowck->hw);
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+ if (ret) {
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kfree(slowck);
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+ hw = ERR_PTR(ret);
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+ }
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- return clk;
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+ return hw;
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}
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static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
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{
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- struct clk *clk;
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+ struct clk_hw *hw;
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const char *parent_names[2];
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unsigned int num_parents;
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const char *name = np->name;
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@@ -448,12 +464,12 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
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of_property_read_string(np, "clock-output-names", &name);
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- clk = at91_clk_register_sam9260_slow(regmap, name, parent_names,
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+ hw = at91_clk_register_sam9260_slow(regmap, name, parent_names,
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num_parents);
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- if (IS_ERR(clk))
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+ if (IS_ERR(hw))
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return;
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- of_clk_add_provider(np, of_clk_src_simple_get, clk);
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+ of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
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}
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CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
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