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@@ -76,6 +76,7 @@
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#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200)
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+#define HSSPI_OP_MULTIBIT BIT(11)
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#define HSSPI_OP_CODE_SHIFT 13
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#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT)
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@@ -171,9 +172,12 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
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if (opcode != HSSPI_OP_READ)
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step_size -= HSSPI_OPCODE_LEN;
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- __raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
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- 2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
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- 2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
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+ if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||
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+ (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))
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+ opcode |= HSSPI_OP_MULTIBIT;
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+
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+ __raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT |
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+ 1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT | 0xff,
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bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
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while (pending > 0) {
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@@ -374,7 +378,8 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
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master->num_chipselect = 8;
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master->setup = bcm63xx_hsspi_setup;
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master->transfer_one_message = bcm63xx_hsspi_transfer_one;
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- master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
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+ SPI_RX_DUAL | SPI_TX_DUAL;
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->auto_runtime_pm = true;
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